3b99fb1b4a
Xtensa's arch level atomic implementation requries S32C1I support which may not exist as Xtensa cores are highly configurable. Implying CONFIG_ATOMIC_OPERATIONS_ARCH at arch level has a side effect that it is enabled regardless if the other options are enabled. Given how the header file's #ifdef is structured, only C atomic ops can override this, which means enabling CONFIG_ATOMIC_OPERATIONS_BUILTIN has no effect at all. So let the SoC or board decide which atomic ops are being used instead. Signed-off-by: Daniel Leung <daniel.leung@intel.com> |
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| .. | ||
| arc | ||
| arm | ||
| arm64 | ||
| common | ||
| mips | ||
| nios2 | ||
| posix | ||
| riscv | ||
| sparc | ||
| x86 | ||
| xtensa | ||
| CMakeLists.txt | ||
| Kconfig | ||