ec2b9d42af
This changes pci_msi_enable() to take IRQ number as a function parameter. The old behavior relies on putting the IRQ number into the interrupt line register in the PCI config space during IRQ allocation, and reading it back when enabling IRQ. However, the interrupt line register is only required to be read-/writable when legacy interrupt is supported on the device. Otherwise it has undefined behavior. On ACRN, they don't even care about this register and always wires it to 0x00. So this commit changes the behavior in pci_msi_enable() to not require reading back the interrupt line register and instead takes the IRQ number via function parameter. Fixes #36765 Signed-off-by: Daniel Leung <daniel.leung@intel.com> |
||
|---|---|---|
| .. | ||
| endpoint | ||
| msi.h | ||
| pcie.h | ||