intel_s1000 uses DesignWare IP for UART. National Semiconductor 16550 (UART) component specification is followed in this IP. Change-Id: Ied7df1dc178d55b6dbe71d729d6383ba07274ea4 Signed-off-by: Rajavardhan Gundi <rajavardhan.gundi@intel.com> Signed-off-by: Anas Nashif <anas.nashif@intel.com>
123 lines
2.5 KiB
C
123 lines
2.5 KiB
C
/*
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* Copyright (c) 2016 Cadence Design Systems, Inc.
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef XTENSA_SYS_IO_H
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#define XTENSA_SYS_IO_H
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#if !defined(_ASMLANGUAGE)
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#include <sys_io.h>
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/* Memory mapped registers I/O functions */
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static ALWAYS_INLINE u32_t sys_read32(mem_addr_t addr)
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{
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return *(volatile u32_t *)addr;
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}
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static ALWAYS_INLINE void sys_write32(u32_t data, mem_addr_t addr)
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{
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*(volatile u32_t *)addr = data;
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}
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static ALWAYS_INLINE u8_t sys_read8(mem_addr_t addr)
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{
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return *(volatile u8_t *)addr;
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}
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static ALWAYS_INLINE void sys_write8(u8_t data, mem_addr_t addr)
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{
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*(volatile u8_t *)addr = data;
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}
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/* Memory bit manipulation functions */
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static ALWAYS_INLINE void sys_set_bit(mem_addr_t addr, unsigned int bit)
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{
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u32_t temp = *(volatile u32_t *)addr;
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*(volatile u32_t *)addr = temp | (1 << bit);
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}
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static ALWAYS_INLINE void sys_clear_bit(mem_addr_t addr, unsigned int bit)
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{
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u32_t temp = *(volatile u32_t *)addr;
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*(volatile u32_t *)addr = temp & ~(1 << bit);
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}
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static ALWAYS_INLINE int sys_test_bit(mem_addr_t addr, unsigned int bit)
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{
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int temp = *(volatile int *)addr;
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return (int)(temp & (1 << bit));
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}
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static ALWAYS_INLINE int sys_test_and_set_bit(mem_addr_t addr, unsigned int bit)
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{
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int retval = (*(volatile int *)addr) & (1 << bit);
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*(volatile int *)addr = (*(volatile int *)addr) | (1 << bit);
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return retval;
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}
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static ALWAYS_INLINE
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int sys_test_and_clear_bit(mem_addr_t addr, unsigned int bit)
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{
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int retval = (*(volatile int *)addr) & (1 << bit);
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*(volatile int *)addr = (*(volatile int *)addr) & ~(1 << bit);
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return retval;
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}
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static ALWAYS_INLINE
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void sys_bitfield_set_bit(mem_addr_t addr, unsigned int bit)
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{
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/* Doing memory offsets in terms of 32-bit values to prevent
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* alignment issues
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*/
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sys_set_bit(addr + ((bit >> 5) << 2), bit & 0x1F);
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}
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static ALWAYS_INLINE
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void sys_bitfield_clear_bit(mem_addr_t addr, unsigned int bit)
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{
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sys_clear_bit(addr + ((bit >> 5) << 2), bit & 0x1F);
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}
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static ALWAYS_INLINE
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int sys_bitfield_test_bit(mem_addr_t addr, unsigned int bit)
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{
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return sys_test_bit(addr + ((bit >> 5) << 2), bit & 0x1F);
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}
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static ALWAYS_INLINE
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int sys_bitfield_test_and_set_bit(mem_addr_t addr, unsigned int bit)
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{
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int ret;
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ret = sys_bitfield_test_bit(addr, bit);
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sys_bitfield_set_bit(addr, bit);
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return ret;
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}
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static ALWAYS_INLINE
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int sys_bitfield_test_and_clear_bit(mem_addr_t addr, unsigned int bit)
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{
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int ret;
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ret = sys_bitfield_test_bit(addr, bit);
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sys_bitfield_clear_bit(addr, bit);
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return ret;
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}
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#endif /* !_ASMLANGUAGE */
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#endif /* XTENSA_SYS_IO_H */
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