If CONFIG_LEGACY_CLIC is disabled, i.e. we adhere to the current CLIC spec, the mode bits of mtvec have to be 0x3. Everything else is reserved. Therefore if CONFIG_RISCV_VECTORED_MODE is enabled, the current implementation is correct. If CONFIG_RISCV_VECTORED_MODE is disabled, the mode bits have to be set, too. Signed-off-by: Greter Raffael <rgreter@baumer.com> |
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| arc | ||
| arm | ||
| arm64 | ||
| mips | ||
| nios2 | ||
| posix | ||
| riscv | ||
| sparc | ||
| x86 | ||
| xtensa | ||
| CMakeLists.txt | ||
| Kconfig | ||