2e9154a418
Changes signature so it takes uint32_t instead of pointer to a register. Later `sys_read*` and `sys_write*` functions are used, which cast given address to volatile pointer anyway. This required changing types of some fields in LiteX GPIO driver and removal of two casts in clock control driver. There was a weird assert from LiteX GPIO driver, which checked whether size of first register in dts was a multiple of 4. It didn't make much sense, so I removed it. Previous dts was describing size of a register in terms of subregisters used. New one uses size of register, so right now it is almost always 4 bytes. Most drivers don't read register size from dts anyway, so only changes had to be made in GPIO and clock control drivers. Both use `litex_read` and `litex_write` to operate on `n`bytes. Now GPIO driver calculates this `n` value in compile time from given number of pins and stores it in `reg_size` field of config struct like before. Registe sizes in clock control driver are hardcoded, because they are tied to LiteX wrapper anyway. This makes it possible to have code, independent of CSR data width. Signed-off-by: Michal Sieron <msieron@internships.antmicro.com> |
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| .. | ||
| arc | ||
| arm | ||
| arm64 | ||
| bindings | ||
| common | ||
| nios2 | ||
| posix | ||
| riscv | ||
| sparc | ||
| x86 | ||
| xtensa | ||
| binding-template.yaml | ||
| Kconfig | ||