816a7a09ac
The LLEXT test suites are quite large, and should not be built for "small" SoCs. Filter the tests based on RAM and ROM/flash size. The following test sizes built for nrf52840 where used to determine min sizes: Name: Flash: RAM: llext.loader_build 105 80 llext.readonly 105 79 llext.readonly_mpu 140 95 llext.readonly_mmu 106 145 llext.writable 123 125 llext.writable_relocatable 117 129 llext.writable_slid_linking 108 125 Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
146 lines
4.9 KiB
YAML
146 lines
4.9 KiB
YAML
common:
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tags: llext
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platform_exclude:
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# platforms with active issues
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- numaker_pfm_m487 # See #63167
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- s32z2xxdc2/s32z270/rtu0 # See commit 18a0660
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- s32z2xxdc2/s32z270/rtu1 # See commit 18a0660
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# platforms that are always skipped by the runtime filter
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- qemu_cortex_m0
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- mps2/an383
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- qemu_xtensa/dc233c/mmu
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integration_platforms:
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- qemu_cortex_a9 # ARM Cortex-A9 (ARMv7-A ISA)
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- qemu_cortex_r5 # ARM Cortex-R5 (ARMv7-R ISA)
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- mps2/an385 # ARM Cortex-M3 (ARMv7-M ISA)
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- mps2/an521/cpu0 # ARM Cortex-M33 (ARMv8-M ISA)
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filter: not CONFIG_HARVARD
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extra_configs:
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- arch:arm64:CONFIG_LLEXT_HEAP_SIZE=128
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extra_conf_files:
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- prj.conf
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min_ram: 172 # Size on arm: max: 145, min: 79
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min_flash: 172 # Size on arm: max: 140, min: 105
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tests:
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# While there is in practice no value in compiling subsys/llext/*.c
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# without actually running it to load some extension, let's keep it in
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# good shape and ready to be used by additional architectures in the
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# future.
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llext.loader_build:
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build_only: true
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# Run the suite with all combinations of core Kconfig options for the LLEXT
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# subsystem (storage type, ELF type, MPU/MMU etc). To focus on LLEXT issues,
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# most tests include no_mem_protection.conf, which disables memory protection
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# hardware completely.
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llext.readonly:
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arch_allow: # Xtensa needs writable storage
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- arm
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- riscv
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- arc
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filter: not CONFIG_MPU and not CONFIG_MMU
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extra_conf_files: ['no_mem_protection.conf']
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extra_configs:
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- CONFIG_LLEXT_STORAGE_WRITABLE=n
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llext.readonly_mpu:
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arch_allow: arm # Xtensa needs writable storage, currently not supported on RISC-V
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filter: CONFIG_ARCH_HAS_USERSPACE
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extra_configs:
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- CONFIG_USERSPACE=y
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- CONFIG_LLEXT_STORAGE_WRITABLE=n
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llext.readonly_mmu:
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arch_allow:
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- arm64
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- arm
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- riscv
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filter: CONFIG_MMU or CONFIG_RISCV_PMP
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integration_platforms:
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- qemu_cortex_a53 # ARM Cortex-A53 (ARMv8-A ISA)
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extra_configs:
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- CONFIG_LLEXT_HEAP_SIZE=128 # qemu_cortex_a9 requires larger heap
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- CONFIG_LLEXT_STORAGE_WRITABLE=n
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llext.writable:
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arch_allow:
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- arm
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- xtensa
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- riscv
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- arc
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integration_platforms:
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- qemu_xtensa/dc233c # Xtensa ISA
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filter: not CONFIG_MPU and not CONFIG_MMU
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extra_conf_files: ['no_mem_protection.conf']
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extra_configs:
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- CONFIG_LLEXT_STORAGE_WRITABLE=y
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llext.writable_relocatable:
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arch_allow:
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- arm
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- xtensa
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- riscv
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- arc
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platform_exclude:
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- qemu_arc/qemu_arc_hs5x # See #80949
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- nsim/nsim_hs5x # See #80949
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- nsim/nsim_hs5x/smp # See #80949
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- nsim/nsim_hs5x/smp/12cores # See #80949
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integration_platforms:
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- qemu_xtensa/dc233c # Xtensa ISA
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filter: not CONFIG_MPU and not CONFIG_MMU
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extra_conf_files: ['no_mem_protection.conf']
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extra_configs:
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- CONFIG_LLEXT_STORAGE_WRITABLE=y
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- CONFIG_LLEXT_TYPE_ELF_RELOCATABLE=y
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# Test the Symbol Link Identifier (SLID) linking feature on writable
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# storage to cover both ARM and Xtensa architectures on the same test.
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llext.writable_slid_linking:
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arch_allow:
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- arm
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- xtensa
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- riscv
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- arc
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integration_platforms:
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- qemu_xtensa/dc233c # Xtensa ISA
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filter: not CONFIG_MPU and not CONFIG_MMU
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extra_conf_files: ['no_mem_protection.conf']
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extra_configs:
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- CONFIG_LLEXT_STORAGE_WRITABLE=y
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- CONFIG_LLEXT_EXPORT_BUILTINS_BY_SLID=y
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llext.writable_relocatable_slid_linking:
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arch_allow:
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- arm
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- xtensa
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- riscv
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- arc
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platform_exclude:
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- qemu_arc/qemu_arc_hs5x # See #80949
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- nsim/nsim_hs5x # See #80949
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- nsim/nsim_hs5x/smp # See #80949
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- nsim/nsim_hs5x/smp/12cores # See #80949
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integration_platforms:
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- qemu_xtensa/dc233c # Xtensa ISA
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filter: not CONFIG_MPU and not CONFIG_MMU
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extra_conf_files: ['no_mem_protection.conf']
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extra_configs:
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- CONFIG_LLEXT_STORAGE_WRITABLE=y
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- CONFIG_LLEXT_TYPE_ELF_RELOCATABLE=y
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- CONFIG_LLEXT_EXPORT_BUILTINS_BY_SLID=y
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# Test the export device IDs by hash feature on a single architecture in
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# both normal and SLID mode.
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llext.devices_by_hash:
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arch_allow: arm
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filter: not CONFIG_MPU and not CONFIG_MMU
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extra_conf_files: ['no_mem_protection.conf']
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extra_configs:
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- CONFIG_LLEXT_STORAGE_WRITABLE=n
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- CONFIG_LLEXT_EXPORT_DEV_IDS_BY_HASH=y
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llext.devices_by_hash_slid_linking:
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arch_allow: arm
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filter: not CONFIG_MPU and not CONFIG_MMU
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extra_conf_files: ['no_mem_protection.conf']
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extra_configs:
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- CONFIG_LLEXT_STORAGE_WRITABLE=n
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- CONFIG_LLEXT_EXPORT_DEV_IDS_BY_HASH=y
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- CONFIG_LLEXT_EXPORT_BUILTINS_BY_SLID=y
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