Ilya Tagunov 77bbc42eaf arch: arm: soc: stm32l0: fix port H EXTI ... Ports F and G are not present on some STM32L0 parts, so for these parts port H external interrupt should be enabled by writing value 0x5 instead of 0x7 to SYSCFG_EXTICRn registers (see e.g. RM0367, 10.2.4). Signed-off-by: Ilya Tagunov <tagunil@gmail.com>		2018-04-05 10:31:43 -05:00
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arc	arch/quark_se_c1000_ss: Switch to SPI DW driver	2018-04-04 19:02:35 +02:00
arm	arch: arm: soc: stm32l0: fix port H EXTI	2018-04-05 10:31:43 -05:00
common	drivers/interrupt_controller: Introduce multi-level interrupt support	2018-02-06 22:39:05 -05:00
nios2	cleanup: replace old jira numbers with GH issues	2018-03-26 13:13:04 -04:00
posix	kernel: POSIX: Compatibility layer for POSIX message queue APIs.	2018-04-03 15:30:44 -04:00
riscv32	arch: riscv32: fe310: Always-On domain adress definition	2018-04-05 08:08:08 -05:00
x86	arch/quark_se: Enable SPI port 2 as a slave only	2018-04-04 19:02:35 +02:00
xtensa	xtensa, kernel/sched: Move next switch_handle selection to the scheduler	2018-03-18 16:58:12 -04:00
CMakeLists.txt	Introduce cmake-based rewrite of KBuild	2017-11-08 20:00:22 -05:00
Kconfig	arch: arc: Use DTS for all ARC SoCs	2018-03-23 10:13:53 +01:00