Michael Hope 1d7a095779 soc: wch: move from qingke-v2 to the more specific qingke-v2a ... The CH32V003 CPU is a QingKe V2A while others in the CH32V00x series use the QingKe V2C. Prepare for adding support for the CH32V006 moving to the more specifc qingke-v2a, moving some cases of SOC_CH32V003 actually meaning SOC_FAMILY_QINGKE_V2A. Signed-off-by: Michael Hope <michaelh@juju.nz>		2025-04-26 10:55:45 +02:00
..
arc/synopsys	dts: bindings: gpio: use hyphens instead of underscore	2025-01-15 11:51:33 +01:00
arm	drivers: mipi_dbi: Add PM action for NXP driver	2025-04-25 19:00:06 +02:00
arm64	drivers: gpio: Add support for RZ/A3UL	2025-03-19 03:34:15 +01:00
bindings	drivers: sensor: adxl362: FIFO mode from DT	2025-04-26 10:55:34 +02:00
common	dts: common: espressif: update flash partitions	2025-04-25 18:59:46 +02:00
nios2/intel
posix
riscv	soc: wch: move from qingke-v2 to the more specific qingke-v2a	2025-04-26 10:55:45 +02:00
sparc/gaisler
x86/intel	boards: intel: btl: Adds Bartlett Lake board	2025-03-29 07:44:22 -04:00
xtensa	dts: xtensa: nxp: add mailbox node	2025-04-07 15:17:34 +02:00
binding-template.yaml
Kconfig