zephyr/dts
Nickolas Lapp 521e093cde I2S_MCUX: Fixup I2S MCUX Audio PLL Rate Calculation and Reg Writes
This PR Fixes the Audio PLL Rate Calculation (there was an additional
divide / 8 which is not necessary and does not appear in similar
calculations in example code from the SDK).

Additionally, it adjusts the SAI .dtsi to more correctly configure the
mclk rate, and adds comments specifying what the regististers mean.

Signed-off-by: Nickolas Lapp <nickolaslapp@gmail.com>
2022-05-19 11:01:53 -05:00
..
arc/synopsys ARC: boards: HSDK: ged rid of pinmux usage 2022-05-18 17:20:26 +02:00
arm I2S_MCUX: Fixup I2S MCUX Audio PLL Rate Calculation and Reg Writes 2022-05-19 11:01:53 -05:00
arm64 boards: imx8mp: partial pin control support 2022-05-12 16:57:17 -05:00
bindings ARC: HSDK: remove pinmux_hsdk driver 2022-05-18 17:20:26 +02:00
common
nios2/intel dts: nios2: intel: Move SoC devicetree includes under a vendor directory 2022-05-09 17:54:48 -04:00
posix
riscv esp32/s2/c3: pinctrl: dts: move pinctrl node out of SoC bus 2022-05-13 11:25:58 -07:00
sparc/gaisler dts: sparc: gaisler: Move SoC devicetree includes under a vendor dir 2022-05-09 17:54:48 -04:00
x86/intel dts: x86: intel: Move SoC devicetree includes under a vendor directory 2022-05-09 17:54:48 -04:00
xtensa esp32/s2/c3: pinctrl: dts: move pinctrl node out of SoC bus 2022-05-13 11:25:58 -07:00
binding-template.yaml
Kconfig