zephyr/tests/drivers/uart/uart_async_api
Marek Matej 6b57b3b786 soc: xtensa,riscv: esp32xx: refactor folder structure
Refactor the ESP32 target SOCs together with
all related boards. Most braking changes includes:

- changing the CONFIG_SOC_ESP32* to refer to
  the actual soc line (esp32,esp32s2,esp32s3,esp32c3)
- replacing CONFIG_SOC with the CONFIG_SOC_SERIES
- creating CONFIG_SOC_FAMILY_ESP32 to embrace all
  the ESP32 across all used architectures
- introducing CONFIG_SOC_PART_NUMBER_* to
  provide a SOC model config
- introducing the 'common' folder to hide all
  commonly used configs and files.
- updating west.yml to reflect previous changes in hal

Signed-off-by: Marek Matej <marek.matej@espressif.com>
2023-07-25 18:12:33 +02:00
..
boards tests: drivers: uart: async: esp32c3: use internal loopback 2023-06-22 08:13:36 +00:00
src soc: xtensa,riscv: esp32xx: refactor folder structure 2023-07-25 18:12:33 +02:00
CMakeLists.txt tests: drivers: uart: move the uart async tests to new ztest API 2022-09-08 15:25:52 +00:00
prj.conf tests: drivers: uart: move the uart async tests to new ztest API 2022-09-08 15:25:52 +00:00
testcase.yaml tests/samples: use integration_platforms more where it makes sense 2023-05-26 17:52:02 -04:00