8ac6f74a7d
Besides adding ARCH_HAS_CODE_DATA_RELOCATION, this patch also adds support for the "sample_controller" SoC (used by qemu_xtensa) as demonstration. As Xtensa lacks a common linker script at the arch level, enabling it for each platform will be a piecemeal effort. This patch adds it to the `soc/xtensa/sample_controller` SoC. Basically, default RAMABLE_REGION is set to be called "RAM", and hooks are inserted so that gen_relocate_app.py can add the relevant linker bits. Also, `tests/application_developent/code_relocation` was tweaked to support the qemu_xtensa platform. Basically, add the relevant linker script and ensure that relevant memory regions have their program header (PHDR) associated. Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
6 lines
161 B
Plaintext
6 lines
161 B
Plaintext
CONFIG_CODE_DATA_RELOCATION=y
|
|
CONFIG_ZTEST=y
|
|
CONFIG_ZTEST_NEW_API=y
|
|
CONFIG_HAVE_CUSTOM_LINKER_SCRIPT=y
|
|
CONFIG_CUSTOM_LINKER_SCRIPT="linker_xtensa_qemu_sram2.ld"
|