Bas van Loon d56f5f7b0e soc: mimxrt11xx: Allow to override SYS PLL2/3 output divider(s). ... To reduce the SEMC clock to a usable speed we had to divide down the output clock of System PLL2 PFD1. To do this I had to override the hardcoded defaults. This commit adds the flexibility to override them in your board files. Signed-off-by: Bas van Loon <bas@arch-embedded.com>		2025-07-23 09:32:53 +02:00
..
imxrt5xx	xtensa: support for more than 32 interrupts	2025-06-27 08:59:56 -10:00
imxrt6xx	xtensa: support for more than 32 interrupts	2025-06-27 08:59:56 -10:00
imxrt7xx	soc: nxp: imxrt7xx: set I2S_HAS_PLL_SETTING as n	2025-06-24 15:35:07 -05:00
imxrt10xx	soc: imxrt: mimxrt1011 i2s clock fix	2025-06-30 15:19:24 -05:00
imxrt11xx	soc: mimxrt11xx: Allow to override SYS PLL2/3 output divider(s).	2025-07-23 09:32:53 +02:00
imxrt118x	kconfig: fix typo in (soc, subsys)	2025-07-01 10:58:54 -10:00
boot_header.ld	soc: nxp: Fix boot header placement when using lld	2025-04-21 22:03:38 +02:00
CMakeLists.txt	soc: imxrt: No need for USB linker script on RT7XX	2025-03-07 19:48:38 +01:00
container.ld
flexspi_nor_config.h
Kconfig	soc: imxrt: Clean up INIT_ARM_PLL config	2025-06-27 18:27:26 -05:00
Kconfig.defconfig	soc: imxrt: remove MEMC config selection	2025-05-27 16:44:37 +02:00
Kconfig.soc
Kconfig.sysbuild	soc: nxp: imxrt: add CONFIG_SECOND_CORE_MCUX_LAUNCHER	2025-01-07 20:34:26 +01:00
mpu_regions.c
soc.yml	soc: imxrt: add mimxrt1052/1062 flashing configuration	2025-05-31 03:36:24 +02:00
sysbuild.cmake	soc: nxp: imxrt: add CONFIG_SECOND_CORE_MCUX_LAUNCHER	2025-01-07 20:34:26 +01:00
usb.ld