zephyr/arch
Jaxson Han 0c03a0572b arch: arm64: mpu: Fix mpu init assertion fail
During mpu init, we check MSA_frac bits[55:52] and MSA bits[51:48] of
the ID_AA64MMFR0_EL1 register. Currently we only allow 1F to pass the
check. But according to Armv8-R AArch64 manual [1], both 1F and 2F
indicates the processor supports MPU. This commit aims at fixing this.

[1]: https://developer.arm.com/documentation/ddi0600/latest/

Signed-off-by: Jaxson Han <jaxson.han@arm.com>
2021-06-09 23:40:03 -05:00
..
arc arch: arc: _reset and _start section fix 2021-05-26 04:43:06 -05:00
arm tfm: Put saving of FPU context into its own file so it can be reused 2021-06-07 15:23:22 +02:00
arm64 arch: arm64: mpu: Fix mpu init assertion fail 2021-06-09 23:40:03 -05:00
common arch: common: Fix 10.4 violations 2021-04-10 09:59:37 -04:00
nios2 arch: nios2: Fix 10.4 violations 2021-04-10 09:59:37 -04:00
posix arch: replace power/power.h with pm/pm.h 2021-05-05 18:35:49 -04:00
riscv arch: riscv: enable FPU of threads in unshared FP mode 2021-06-08 11:47:02 -05:00
sparc SPARC: add the Flush windows software trap 2021-05-28 06:32:36 -05:00
x86 arch/x86_64: Use modern CR0 assembly 2021-06-03 20:07:50 -05:00
xtensa xtensa: fix booting secondary cores on the dummy thread 2021-05-03 17:13:01 -04:00
CMakeLists.txt
Kconfig kernel: mmu: z_backing_store* to k_mem_paging_backing_store* 2021-05-28 11:33:22 -04:00