21da37b400
Add code for sama7g5 Generic Clock, Main Clock, Main System Bus Clock, Peripheral Clock, Programmable Clock and PLL Clock. Signed-off-by: Tony Han <tony.han@microchip.com>
33 lines
1.0 KiB
C
33 lines
1.0 KiB
C
/*
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* Copyright (C) 2025 Microchip Technology Inc. and its subsidiaries
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef ZEPHYR_SOC_MICROCHIP_SAM_COMMON_PINCTRL_SOC_H_
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#define ZEPHYR_SOC_MICROCHIP_SAM_COMMON_PINCTRL_SOC_H_
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typedef struct pinctrl_soc_pin_t {
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uint32_t pin_mux;
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uint32_t bias_disable: 1;
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uint32_t bias_pull_down: 1;
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uint32_t bias_pull_up: 1;
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uint32_t drive_open_drain: 1;
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} pinctrl_soc_pin_t;
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#define Z_PINCTRL_STATE_PIN_INIT(node_id, prop, idx) { \
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.pin_mux = DT_PROP_BY_IDX(node_id, prop, idx), \
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.bias_disable = DT_PROP(node_id, bias_disable), \
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.bias_pull_down = DT_PROP(node_id, bias_pull_down), \
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.bias_pull_up = DT_PROP(node_id, bias_pull_up), \
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.drive_open_drain = DT_PROP(node_id, drive_open_drain), \
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},
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#define Z_PINCTRL_STATE_PINS_INIT(node_id, prop) { \
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DT_FOREACH_CHILD_VARGS(DT_PHANDLE(node_id, prop), \
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DT_FOREACH_PROP_ELEM, pinmux, \
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Z_PINCTRL_STATE_PIN_INIT) \
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}
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#endif /* ZEPHYR_SOC_MICROCHIP_SAM_COMMON_PINCTRL_SOC_H_ */
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