21da37b400
Add code for sama7g5 Generic Clock, Main Clock, Main System Bus Clock, Peripheral Clock, Programmable Clock and PLL Clock. Signed-off-by: Tony Han <tony.han@microchip.com>
142 lines
2.8 KiB
C
142 lines
2.8 KiB
C
/*
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* Copyright (C) 2025 Microchip Technology Inc. and its subsidiaries
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <pmc.h>
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#include <zephyr/device.h>
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#include <zephyr/kernel.h>
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#include <zephyr/spinlock.h>
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#include <zephyr/logging/log.h>
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LOG_MODULE_REGISTER(clk_system, CONFIG_CLOCK_CONTROL_LOG_LEVEL);
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#define SYSTEM_MAX_ID 31
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#define SYSTEM_MAX_NAME_SZ 32
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#define to_clk_system(ptr) CONTAINER_OF(ptr, struct clk_system, clk)
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struct clk_system {
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struct device clk;
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const struct device *parent;
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pmc_registers_t *pmc;
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uint8_t id;
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};
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static struct clk_system clocks_sys[8];
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static uint32_t clocks_sys_idx;
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static inline int is_pck(int id)
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{
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return (id >= 8) && (id <= 15);
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}
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static inline bool clk_system_ready(pmc_registers_t *pmc, int id)
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{
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uint32_t status = pmc->PMC_SR;
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return !!(status & (1 << id));
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}
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static int clk_system_on(const struct device *dev, clock_control_subsys_t subsys)
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{
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ARG_UNUSED(subsys);
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struct clk_system *sys = to_clk_system(dev);
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sys->pmc->PMC_SCER = 1 << sys->id;
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if (!is_pck(sys->id)) {
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return 0;
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}
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while (!clk_system_ready(sys->pmc, sys->id)) {
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k_busy_wait(1);
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}
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return 0;
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}
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static int clk_system_off(const struct device *dev, clock_control_subsys_t subsys)
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{
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ARG_UNUSED(subsys);
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struct clk_system *sys = to_clk_system(dev);
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sys->pmc->PMC_SCDR = 1 << sys->id;
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return 0;
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}
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static int clk_system_get_rate(const struct device *dev,
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clock_control_subsys_t subsys, uint32_t *rate)
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{
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ARG_UNUSED(subsys);
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struct clk_system *sys = to_clk_system(dev);
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return clock_control_get_rate(sys->parent, NULL, rate);
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}
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static enum clock_control_status clk_system_get_status(const struct device *dev,
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clock_control_subsys_t subsys)
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{
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ARG_UNUSED(subsys);
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struct clk_system *sys = to_clk_system(dev);
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uint32_t status;
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status = sys->pmc->PMC_SCSR;
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if (!(status & (1 << sys->id))) {
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return CLOCK_CONTROL_STATUS_OFF;
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}
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if (!is_pck(sys->id)) {
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return CLOCK_CONTROL_STATUS_ON;
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}
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status = sys->pmc->PMC_SR;
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if (!!(status & (1 << sys->id))) {
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return CLOCK_CONTROL_STATUS_ON;
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} else {
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return CLOCK_CONTROL_STATUS_OFF;
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}
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}
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static DEVICE_API(clock_control, system_api) = {
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.on = clk_system_on,
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.off = clk_system_off,
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.get_rate = clk_system_get_rate,
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.get_status = clk_system_get_status,
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};
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int clk_register_system(pmc_registers_t *const pmc, const char *name,
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const struct device *parent,
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uint8_t id, struct device **clk)
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{
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struct clk_system *sys;
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if (!parent || id > SYSTEM_MAX_ID) {
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return -EINVAL;
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}
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sys = &clocks_sys[clocks_sys_idx++];
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if (clocks_sys_idx > ARRAY_SIZE(clocks_sys)) {
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LOG_ERR("Array for system clock not enough");
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return -ENOMEM;
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}
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*clk = &sys->clk;
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(*clk)->name = name;
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(*clk)->api = &system_api;
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sys->parent = parent;
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sys->id = id;
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sys->pmc = pmc;
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return 0;
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}
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