21da37b400
Add code for sama7g5 Generic Clock, Main Clock, Main System Bus Clock, Peripheral Clock, Programmable Clock and PLL Clock. Signed-off-by: Tony Han <tony.han@microchip.com>
117 lines
2.7 KiB
C
117 lines
2.7 KiB
C
/*
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* Copyright (C) 2025 Microchip Technology Inc. and its subsidiaries
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <pmc.h>
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#include <zephyr/device.h>
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#include <zephyr/kernel.h>
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#include <zephyr/spinlock.h>
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#include <zephyr/logging/log.h>
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LOG_MODULE_REGISTER(clk_prog, CONFIG_CLOCK_CONTROL_LOG_LEVEL);
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#define PROG_ID_MAX 7
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#define PROG_PRES(layout, pckr) ((pckr >> layout->pres_shift) & layout->pres_mask)
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struct clk_programmable {
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struct device clk;
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struct device *parents[9];
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pmc_registers_t *pmc;
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uint32_t *mux_table;
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uint8_t id;
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uint8_t num_parents;
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uint8_t parent;
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const struct clk_programmable_layout *layout;
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};
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#define to_clk_programmable(ptr) CONTAINER_OF(ptr, struct clk_programmable, clk)
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static struct clk_programmable clocks_prog[8];
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static uint32_t clocks_prog_idx;
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static int clk_programmable_get_rate(const struct device *dev,
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clock_control_subsys_t sys, uint32_t *rate)
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{
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ARG_UNUSED(sys);
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struct clk_programmable *prog = to_clk_programmable(dev);
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const struct clk_programmable_layout *layout = prog->layout;
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const struct device *parent = NULL;
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uint32_t pckr;
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uint32_t css;
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uint32_t i;
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int ret;
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pckr = prog->pmc->PMC_PCK[prog->id];
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css = pckr & PMC_PCK_CSS_Msk;
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for (i = 0; i < prog->num_parents; i++) {
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if (css == prog->mux_table[i]) {
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parent = prog->parents[i];
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break;
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}
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}
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if (!parent) {
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LOG_ERR("find parent clock failed.");
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return -ENXIO;
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}
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ret = clock_control_get_rate(parent, NULL, rate);
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if (ret) {
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LOG_ERR("get parent clock rate failed.");
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return ret;
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}
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if (layout->is_pres_direct) {
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*rate = *rate / (PROG_PRES(layout, pckr) + 1);
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} else {
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*rate = *rate >> PROG_PRES(layout, pckr);
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}
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return 0;
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}
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static DEVICE_API(clock_control, programmable_api) = {
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.get_rate = clk_programmable_get_rate,
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};
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int clk_register_programmable(pmc_registers_t *const pmc, const char *name,
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const struct device **parents,
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uint8_t num_parents, uint8_t id,
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const struct clk_programmable_layout *layout,
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uint32_t *mux_table, struct device **clk)
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{
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struct clk_programmable *prog;
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if (id > PROG_ID_MAX || !parents) {
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return -EINVAL;
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}
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prog = &clocks_prog[clocks_prog_idx++];
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if (clocks_prog_idx > ARRAY_SIZE(clocks_prog)) {
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LOG_ERR("Array for programmable clock not enough");
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return -ENOMEM;
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}
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if (num_parents > ARRAY_SIZE(prog->parents)) {
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LOG_ERR("Array for parent clock not enough, at least %d", num_parents);
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return -ENOMEM;
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}
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memcpy(prog->parents, parents, sizeof(struct device *) * num_parents);
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*clk = &prog->clk;
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(*clk)->name = name;
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(*clk)->api = &programmable_api;
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prog->num_parents = num_parents;
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prog->id = id;
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prog->layout = layout;
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prog->pmc = pmc;
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prog->mux_table = mux_table;
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return 0;
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}
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