TI MSPM0 SoC series has General Purpose Timer and Advanced control timers with Counting module, Capture block (measure input signal period/time) and Compare block (to generate time expiry, output waveform like PWM). Add a support for counter driver with alarm and counter top functions. Signed-off-by: Saravanan Sekar <saravanan@linumiz.com>
39 lines
569 B
YAML
39 lines
569 B
YAML
# Copyright 2025 Linumiz GmbH
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# SPDX-License-Identifier: Apache-2.0
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description: TI MSPM0 Timer
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compatible: "ti,mspm0-timer"
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include: base.yaml
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properties:
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reg:
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required: true
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interrupts:
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required: true
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clk-prescaler:
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type: int
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required: true
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description: |
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TIMCLK clock source prescaler value.
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Valid range [0 ... 255].
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clk-div:
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type: int
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required: true
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default: 1
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enum:
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- 1
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- 2
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- 3
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- 4
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- 5
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- 6
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- 7
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- 8
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description: |
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Clock divider selction value.
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