zephyr/dts/bindings/mdio
Łukasz Iwaszkiewicz 2fa0afbc37 drivers: mdio_esp32: let the REF_CLK be initialized before the PHY.
When GPIO17 or 16 is used as an external REF_CLK signal, the output is
enabled in eth_esp32.c This was added in PR number #65759 and then refined
in PR #74442. However this does not work for PHYs which need the REF_CLK
for MDIO communication, such as LAN8720A. In such cases phy_mii driver
tries to get the ID of such a PHY before REF_CLK is present. Therefore
in this PR I propose to move REF_CLK initialization from eth_esp32.c to
mdio_esp32.c which gets initialized before PHY and ETH.

Signed-off-by: Łukasz Iwaszkiewicz <lukasz.iwaszkiewicz@gmail.com>
2025-04-23 14:59:36 +02:00
..
adi,adin2111-mdio.yaml
atmel,sam-mdio.yaml
espressif,esp32-mdio.yaml drivers: mdio_esp32: let the REF_CLK be initialized before the PHY. 2025-04-23 14:59:36 +02:00
infineon,xmc4xxx-mdio.yaml
litex,liteeth-mdio.yaml
mdio-controller.yaml
microchip,lan865x-mdio.yaml
nxp,enet-mdio.yaml
nxp,enet-qos-mdio.yaml
nxp,imx-netc-emdio.yaml
nxp,s32-gmac-mdio.yaml
nxp,s32-netc-emdio.yaml
renesas,ra-mdio.yaml
sensry,sy1xx-mdio.yaml drivers: mdio: sy1xx add support for mdio 2025-02-05 17:49:40 +01:00
smsc,lan91c111-mdio.yaml
snps,dwcxgmac-mdio.yaml
st,stm32-mdio.yaml dts: stm32: Streamline Devicetree binding descriptions 2025-03-04 21:55:54 +01:00
xilinx,axi-ethernet-1.00.a-mdio.yaml drivers: ethernet: Add Xilinx AXI Enet driver 2025-03-24 09:53:43 +01:00
zephyr,mdio-gpio.yaml