Amneesh Singh c7a21c3da5 soc: ti: k3: add AM2434 support ... Add SoC support and device trees for Texas Instruments AM2434 SoC. Both R5 and M4 cores are supported here. Signed-off-by: Amneesh Singh <a-singh7@ti.com>		2025-06-16 13:59:09 -04:00
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mspm0	dts: arm: ti: mspm0: Add a support for TI MSPM0 Timer Counter	2025-06-10 10:25:10 -04:00
am62x_m4.dtsi	dts: arm: ti: Adjust GPIO memory address	2025-05-28 08:14:18 +02:00
am64x_m4.dtsi	soc: ti: k3: add AM2434 support	2025-06-16 13:59:09 -04:00
am64x_main.dtsi	soc: ti: k3: add AM2434 support	2025-06-16 13:59:09 -04:00
am64x_mcu.dtsi	soc: ti: k3: add AM2434 support	2025-06-16 13:59:09 -04:00
am64x_r5.dtsi	soc: ti: k3: add AM2434 support	2025-06-16 13:59:09 -04:00
cc13xx_cc26xx.dtsi
cc23x0.dtsi	dts: arm: ti: cc23x0: Add DMA mode support to AES module	2025-06-11 16:06:55 -07:00
cc32xx.dtsi
cc1352r7.dtsi
cc1352r.dtsi
cc2340r5.dtsi	dts: arm: ti: cc23x0: Add flash support	2025-02-04 11:56:05 +01:00
cc2652r.dtsi
cc3220sf.dtsi
cc3235sf.dtsi
j721e_main_r5.dtsi	dts: arm: ti: j721e_main_r5: Add mailbox node	2025-05-08 12:24:40 +02:00
j722s_main_r5.dtsi	dts: arm: ti: j722s_main_r5: Add mailbox node	2025-05-08 12:24:40 +02:00
j722s_main.dtsi	ti: j722s: Fix reg length in pinctrl as per TRM description	2025-06-10 22:06:50 +02:00
j722s_mcu_r5.dtsi	dts: arm: ti: j722s_mcu_r5: Add mailbox node	2025-05-08 12:24:40 +02:00
j722s_mcu.dtsi	dts: arm: ti: Adjust GPIO memory address	2025-05-28 08:14:18 +02:00
lm3s6965.dtsi
msp432p4xx.dtsi
msp432p401r.dtsi