zephyr/dts/arm/silabs
S Mohamed Fiaz aaf21a4c9e soc: silabs: siwx91x: Add configurable power profile support via DeviceTree
This commit adds support for configuring the power/performance
profile for the siwx91x device using a generic
'power-profile' property in DeviceTree.
The property is available for NWP nodes,
allowing flexible selection of power management
profiles per application or board via overlay.

Signed-off-by: S Mohamed Fiaz <fiaz.mohamed@silabs.com>
2025-06-13 10:08:38 -07:00
..
xg21 dts: bindings: debug: Add Silicon Labs Packet Trace Interface 2025-06-13 11:12:20 +02:00
xg22 dts: bindings: debug: Add Silicon Labs Packet Trace Interface 2025-06-13 11:12:20 +02:00
xg23 dts: bindings: debug: Add Silicon Labs Packet Trace Interface 2025-06-13 11:12:20 +02:00
xg24 dts: bindings: debug: Add Silicon Labs Packet Trace Interface 2025-06-13 11:12:20 +02:00
xg27 dts: bindings: debug: Add Silicon Labs Packet Trace Interface 2025-06-13 11:12:20 +02:00
xg29 dts: bindings: debug: Add Silicon Labs Packet Trace Interface 2025-06-13 11:12:20 +02:00
efm32_jg_pg_12b.dtsi
efm32_pg_1b.dtsi
efm32gg11b820f2048gl192.dtsi
efm32gg11b.dtsi
efm32gg12b810f1024gm64.dtsi
efm32gg12b.dtsi
efm32hg322f64.dtsi
efm32hg.dtsi
efm32jg12b500f1024gl125.dtsi
efm32jg12b.dtsi
efm32pg1b200f256gm48.dtsi
efm32pg1b.dtsi
efm32pg12b500f1024gl125.dtsi
efm32pg12b.dtsi
efm32wg990f256.dtsi
efm32wg.dtsi
efr32bg13p632f512gm48.dtsi
efr32fg1p133f256gm48.dtsi
efr32fg1p.dtsi
efr32fg13p233f512gm48.dtsi
efr32mg12p332f1024gl125.dtsi
efr32mg12p432f1024gl125.dtsi
efr32mg12p433f1024gm68.dtsi
efr32mg.dtsi
efr32xg1p-pinctrl.dtsi
efr32xg13p-pinctrl.dtsi
efr32xg13p.dtsi
gpio_gecko.h
sim3u167.dtsi
sim3u.dtsi
siwg917.dtsi soc: silabs: siwx91x: Add configurable power profile support via DeviceTree 2025-06-13 10:08:38 -07:00
siwg917m111mgtba.dtsi soc: silabs: Introduce new SoC SiWG917 2025-02-11 22:07:11 +01:00