47e43d552e
When uart_ns16550_irq_tx_enable() is called and the TX FIFO is already empty, no new interrupt is generated, causing data transmission to stall in some cases. This patch introduces a workaround to simulate an ISR callback if the FIFO is empty when enabling the TX IRQ. Signed-off-by: Jacky Lee <jacky.lee@egistec.com>
120 lines
3.7 KiB
Plaintext
120 lines
3.7 KiB
Plaintext
# SPDX-License-Identifier: Apache-2.0
|
|
|
|
menuconfig UART_NS16550
|
|
bool "NS16550 serial driver"
|
|
default y
|
|
depends on DT_HAS_NS16550_ENABLED
|
|
select SERIAL_HAS_DRIVER
|
|
select SERIAL_SUPPORT_INTERRUPT
|
|
select PINCTRL if $(dt_compat_any_has_prop,$(DT_COMPAT_NS16550),pinctrl-0)
|
|
help
|
|
This option enables the NS16550 serial driver.
|
|
This driver can be used for the serial hardware
|
|
available on x86 boards.
|
|
|
|
if UART_NS16550
|
|
|
|
config UART_NS16550_LINE_CTRL
|
|
bool "Serial Line Control for Apps"
|
|
depends on UART_LINE_CTRL
|
|
help
|
|
This enables the API for apps to control the serial line,
|
|
such as CTS and RTS.
|
|
|
|
Says n if not sure.
|
|
|
|
config UART_NS16550_DRV_CMD
|
|
bool "Driver Commands"
|
|
depends on UART_DRV_CMD
|
|
help
|
|
This enables the API for apps to send commands to driver.
|
|
|
|
Says n if not sure.
|
|
|
|
config UART_NS16550_INTEL_LPSS_DMA
|
|
bool "INTEL LPSS support for NS16550"
|
|
select SERIAL_SUPPORT_ASYNC
|
|
select DMA if UART_ASYNC_API
|
|
help
|
|
This enables the usage of INTEL LPSS internal DMA for Async operations.
|
|
|
|
choice UART_NS16550_VARIANT
|
|
prompt "UART variant"
|
|
default UART_NS16550_VARIANT_NS16550
|
|
help
|
|
Select UART device variant
|
|
|
|
config UART_NS16550_VARIANT_NS16550
|
|
bool "UART 16550 (16-bytes FIFO)"
|
|
help
|
|
This enables support for 16-bytes FIFO if UART controller is 16550.
|
|
|
|
config UART_NS16550_VARIANT_NS16750
|
|
bool "UART 16750 (64-bytes FIFO and auto flow control)"
|
|
help
|
|
This enables support for 64-bytes FIFO and automatic hardware
|
|
flow control if UART controller is 16750.
|
|
|
|
config UART_NS16550_VARIANT_NS16950
|
|
bool "UART 16950 (128-bytes FIFO and auto flow control)"
|
|
help
|
|
This enables support for 128-bytes FIFO and automatic hardware flow control.
|
|
endchoice
|
|
|
|
config UART_NS16550_ACCESS_WORD_ONLY
|
|
bool "NS16550 only allows word access"
|
|
help
|
|
In some case, e.g. ARC HS Development kit, the peripheral space of ns
|
|
16550 (DesignWare UART) only allows word access, byte access will raise
|
|
exception.
|
|
|
|
config UART_NS16550_TI_K3
|
|
bool "Add support for NS16550 variant specific to TI K3 SoCs"
|
|
select PINCTRL
|
|
help
|
|
Enabling this configuration allows the users to use the UART port in
|
|
Texas Instruments K3 SoCs by enabling a vendor specific extended register
|
|
set.
|
|
|
|
config UART_NS16550_DW8250_DW_APB
|
|
bool "Synopsys DesignWare 8250"
|
|
help
|
|
This enables support for Synopsys DesignWare 8250 UART controller.
|
|
|
|
config UART_NS16550_ITE_HIGH_SPEED_BAUDRATE
|
|
bool "IT8XXX2 specific baud rate configuration"
|
|
help
|
|
Enable IT8XXX2 specific baud rate configuration.
|
|
This applies to high-speed baud rate configuration.
|
|
|
|
menu "NS16550 Workarounds"
|
|
|
|
config UART_NS16550_WA_ISR_REENABLE_INTERRUPT
|
|
bool "Re-enable interrupts by toggling IER at end of ISR"
|
|
depends on UART_INTERRUPT_DRIVEN
|
|
help
|
|
In some configurations (e.g. edge interrupt triggers),
|
|
an interruptible event occurs during ISR and the host interrupt
|
|
controller does not see the new event due to IIR is constantly
|
|
asserting interrupts. For example, the callback handles RX and
|
|
then TX. If another character comes in before end of TX processing
|
|
(TX interrupt still asserts while raising RX interrupt), the host
|
|
interrupt controller may not see this new event. So if needed,
|
|
the IER is being toggled to re-assert interrupts at the end of ISR
|
|
to nudge the host interrupt controller to fire the ISR again.
|
|
|
|
config UART_NS16550_WA_TX_FIFO_EMPTY_INTERRUPT
|
|
bool "Callback directly when the TX FIFO is already empty"
|
|
default y if SHELL_BACKEND_SERIAL
|
|
depends on UART_INTERRUPT_DRIVEN
|
|
help
|
|
When calling uart_ns16550_irq_tx_enable() to wait for the TX FIFO
|
|
ready interrupt, but this interrupt will only be triggered if the
|
|
current state is not empty. Therefore, if the current state is
|
|
empty, you need to solve this problem by calling the callback
|
|
function directly.
|
|
|
|
endmenu
|
|
|
|
endif # UART_NS16550
|