zephyr/drivers/pinctrl/pinctrl_cc23x0.c
Vebjorn Myklebust 9d81b74ff1 drivers: pinctrl: Add support for cc23x0 pinctrl
Add support for pinctrl to cc23x0 SoC. Like for other TI SoCs,
a node approach is implemented (no grouping approach).

Signed-off-by: Lars Thalian Morstad <l-morstad@ti.com>
Signed-off-by: Vebjorn Myklebust <v.myklebust@ti.com>
Signed-off-by: Stoyan Bogdanov <sbogdanov@baylibre.com>
Signed-off-by: Julien Panis <jpanis@baylibre.com>
2025-02-04 11:56:05 +01:00

37 lines
830 B
C

/*
* Copyright (c) 2024 Texas Instruments Incorporated
* Copyright (c) 2024 BayLibre, SAS
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT ti_cc23x0_pinctrl
#include <zephyr/drivers/pinctrl.h>
#include <inc/hw_types.h>
#define IOC_BASE_REG DT_REG_ADDR(DT_NODELABEL(pinctrl))
#define IOC_BASE_PIN_REG 0x00000100
#define IOC_ADDR(index) (IOC_BASE_REG + IOC_BASE_PIN_REG + (sizeof(uint32_t) * (index)))
static int pinctrl_cc23x0_set(uint32_t pin, uint32_t func, uint32_t mode)
{
uint32_t iocfg_reg = IOC_ADDR(pin);
HWREG(iocfg_reg) = mode | func;
return 0;
}
int pinctrl_configure_pins(const pinctrl_soc_pin_t *pins, uint8_t pin_cnt, uintptr_t reg)
{
ARG_UNUSED(reg);
for (uint8_t i = 0U; i < pin_cnt; i++) {
pinctrl_cc23x0_set(pins[i].pin, pins[i].iofunc, pins[i].iomode);
}
return 0;
}