23d1a8fd2d
This makes SSD1327 use the new L8 display format. It also fixes all displays that didnt support the undocumented monochrome mode. It also adds i2c and revamps the entire driver. Signed-off-by: Camille BAUD <mail@massdriver.space>
516 lines
17 KiB
C
516 lines
17 KiB
C
/*
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* Copyright (c) 2024 Savoir-faire Linux
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* Copyright (c) 2025 MASSDRIVER EI (massdriver.space)
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/logging/log.h>
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LOG_MODULE_REGISTER(ssd1327, CONFIG_DISPLAY_LOG_LEVEL);
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#include <string.h>
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#include <zephyr/device.h>
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#include <zephyr/init.h>
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#include <zephyr/drivers/display.h>
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#include <zephyr/drivers/gpio.h>
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#include <zephyr/drivers/i2c.h>
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#include <zephyr/drivers/mipi_dbi.h>
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#include <zephyr/kernel.h>
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#include "ssd1327_regs.h"
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#define SSD1327_ENABLE_VDD 0x01
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#define SSD1327_UNLOCK_COMMAND 0x12
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#define SSD1327_MAXIMUM_CMD_LENGTH 16
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typedef int (*ssd1327_write_bus_cmd_fn)(const struct device *dev, const uint8_t cmd,
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const uint8_t *data, size_t len);
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typedef int (*ssd1327_write_pixels_fn)(const struct device *dev, const uint8_t *buf,
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uint32_t pixel_count,
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const struct display_buffer_descriptor *desc);
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struct ssd1327_config {
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struct i2c_dt_spec i2c;
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ssd1327_write_bus_cmd_fn write_cmd;
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ssd1327_write_pixels_fn write_pixels;
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const struct device *mipi_dev;
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const struct mipi_dbi_config dbi_config;
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uint16_t height;
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uint16_t width;
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uint8_t oscillator_freq;
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uint8_t start_line;
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uint8_t display_offset;
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uint8_t multiplex_ratio;
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uint8_t prechargep;
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uint8_t remap_value;
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uint8_t phase_length;
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uint8_t function_selection_b;
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uint8_t precharge_voltage;
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uint8_t vcomh_voltage;
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bool color_inversion;
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uint8_t *conversion_buf;
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size_t conversion_buf_size;
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};
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struct ssd1327_data {
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uint8_t contrast;
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uint8_t scan_mode;
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};
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static inline int ssd1327_write_bus_cmd_mipi(const struct device *dev, const uint8_t cmd,
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const uint8_t *data, size_t len)
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{
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const struct ssd1327_config *config = dev->config;
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int err;
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/* Values given after the memory register must be sent with pin D/C set to 0. */
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/* Data is sent as a command following the mipi_cbi api */
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err = mipi_dbi_command_write(config->mipi_dev, &config->dbi_config, cmd, NULL, 0);
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if (err) {
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return err;
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}
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for (size_t i = 0; i < len; i++) {
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err = mipi_dbi_command_write(config->mipi_dev, &config->dbi_config,
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data[i], NULL, 0);
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if (err) {
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return err;
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}
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}
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mipi_dbi_release(config->mipi_dev, &config->dbi_config);
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return 0;
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}
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static inline int ssd1327_write_bus_cmd_i2c(const struct device *dev, const uint8_t cmd,
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const uint8_t *data, size_t len)
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{
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const struct ssd1327_config *config = dev->config;
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uint8_t buf[SSD1327_MAXIMUM_CMD_LENGTH];
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if (len > SSD1327_MAXIMUM_CMD_LENGTH - 1) {
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return -EINVAL;
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}
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buf[0] = cmd;
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memcpy(&(buf[1]), data, len);
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return i2c_burst_write_dt(&config->i2c, SSD1327_CONTROL_ALL_BYTES_CMD, buf, len + 1);
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}
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static inline int ssd1327_set_timing_setting(const struct device *dev)
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{
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const struct ssd1327_config *config = dev->config;
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uint8_t buf = SSD1327_UNLOCK_COMMAND;
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int err;
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err = config->write_cmd(dev, SSD1327_SET_PHASE_LENGTH, &config->phase_length, 1);
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if (err < 0) {
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return err;
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}
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err = config->write_cmd(dev, SSD1327_SET_OSC_FREQ, &config->oscillator_freq, 1);
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if (err < 0) {
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return err;
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}
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err = config->write_cmd(dev, SSD1327_SET_PRECHARGE_PERIOD, &config->prechargep, 1);
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if (err < 0) {
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return err;
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}
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err = config->write_cmd(dev, SSD1327_LINEAR_LUT, NULL, 0);
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if (err < 0) {
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return err;
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}
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err = config->write_cmd(dev, SSD1327_SET_PRECHARGE_VOLTAGE, &config->precharge_voltage, 1);
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if (err < 0) {
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return err;
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}
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err = config->write_cmd(dev, SSD1327_SET_VCOMH, &config->vcomh_voltage, 1);
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if (err < 0) {
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return err;
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}
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err = config->write_cmd(dev, SSD1327_FUNCTION_SELECTION_B, &config->function_selection_b,
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1);
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if (err < 0) {
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return err;
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}
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return config->write_cmd(dev, SSD1327_SET_COMMAND_LOCK, &buf, 1);
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}
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static inline int ssd1327_set_hardware_config(const struct device *dev)
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{
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const struct ssd1327_config *config = dev->config;
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uint8_t buf;
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int err;
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err = config->write_cmd(dev, SSD1327_SET_DISPLAY_START_LINE, &config->start_line, 1);
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if (err < 0) {
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return err;
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}
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err = config->write_cmd(dev, SSD1327_SET_DISPLAY_OFFSET, &config->display_offset, 1);
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if (err < 0) {
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return err;
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}
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err = config->write_cmd(dev, SSD1327_SET_NORMAL_DISPLAY, NULL, 0);
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if (err < 0) {
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return err;
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}
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err = config->write_cmd(dev, SSD1327_SET_SEGMENT_MAP_REMAPED, &config->remap_value, 1);
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if (err < 0) {
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return err;
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}
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err = config->write_cmd(dev, SSD1327_SET_MULTIPLEX_RATIO, &config->multiplex_ratio, 1);
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if (err < 0) {
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return err;
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}
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buf = SSD1327_ENABLE_VDD;
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return config->write_cmd(dev, SSD1327_SET_FUNCTION_A, &buf, 1);
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}
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static int ssd1327_resume(const struct device *dev)
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{
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const struct ssd1327_config *config = dev->config;
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return config->write_cmd(dev, SSD1327_DISPLAY_ON, NULL, 0);
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}
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static int ssd1327_suspend(const struct device *dev)
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{
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const struct ssd1327_config *config = dev->config;
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return config->write_cmd(dev, SSD1327_DISPLAY_OFF, NULL, 0);
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}
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static int ssd1327_set_display(const struct device *dev)
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{
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const struct ssd1327_config *config = dev->config;
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int err;
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uint8_t x_position[] = {0, config->width - 1};
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uint8_t y_position[] = {0, config->height - 1};
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err = config->write_cmd(dev, SSD1327_SET_COLUMN_ADDR, x_position, sizeof(x_position));
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if (err < 0) {
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return err;
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}
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err = config->write_cmd(dev, SSD1327_SET_ROW_ADDR, y_position, sizeof(y_position));
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if (err < 0) {
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return err;
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}
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return config->write_cmd(dev, SSD1327_SET_SEGMENT_MAP_REMAPED, &config->remap_value, 1);
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}
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/* Convert what the conversion buffer can hold to pixelx (3:0) and pixelx+1 (7:4) */
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static int ssd1327_convert_L_8(const struct device *dev, const uint8_t *buf, int cur_offset,
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uint32_t pixel_count)
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{
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const struct ssd1327_config *config = dev->config;
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int i = 0;
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for (; i / 2 < config->conversion_buf_size && pixel_count > cur_offset + i; i += 2) {
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config->conversion_buf[i / 2] = buf[cur_offset + i] >> 4;
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config->conversion_buf[i / 2] |= (buf[cur_offset + i + 1] >> 4) << 4;
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}
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return i;
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}
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#if DT_HAS_COMPAT_ON_BUS_STATUS_OKAY(solomon_ssd1327fb, mipi_dbi)
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static int ssd1327_write_pixels_mipi(const struct device *dev, const uint8_t *buf,
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uint32_t pixel_count,
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const struct display_buffer_descriptor *desc)
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{
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const struct ssd1327_config *config = dev->config;
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struct display_buffer_descriptor mipi_desc;
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int ret, i;
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int total = 0;
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mipi_desc.pitch = desc->pitch;
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while (pixel_count > total) {
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i = ssd1327_convert_L_8(dev, buf, total, pixel_count);
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mipi_desc.buf_size = i / 2;
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mipi_desc.width = mipi_desc.buf_size / desc->height;
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mipi_desc.height = mipi_desc.buf_size / desc->width;
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/* This is the wrong format, but it doesn't matter to almost all mipi drivers */
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ret = mipi_dbi_write_display(config->mipi_dev, &config->dbi_config,
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config->conversion_buf, &mipi_desc, PIXEL_FORMAT_L_8);
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if (ret < 0) {
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return ret;
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}
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total += i;
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}
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mipi_dbi_release(config->mipi_dev, &config->dbi_config);
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return 0;
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}
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#endif
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#if DT_HAS_COMPAT_ON_BUS_STATUS_OKAY(solomon_ssd1327fb, i2c)
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static int ssd1327_write_pixels_i2c(const struct device *dev, const uint8_t *buf,
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uint32_t pixel_count,
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const struct display_buffer_descriptor *desc)
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{
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const struct ssd1327_config *config = dev->config;
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int ret, i;
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int total = 0;
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while (pixel_count > total) {
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i = ssd1327_convert_L_8(dev, buf, total, pixel_count);
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ret = i2c_burst_write_dt(&config->i2c, SSD1327_CONTROL_ALL_BYTES_DATA,
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config->conversion_buf, i / 2);
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if (ret < 0) {
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return ret;
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}
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total += i;
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}
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return 0;
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}
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#endif
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static int ssd1327_write(const struct device *dev, const uint16_t x, const uint16_t y,
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const struct display_buffer_descriptor *desc, const void *buf)
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{
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const struct ssd1327_config *config = dev->config;
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int err;
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size_t buf_len;
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int32_t pixel_count = desc->width * desc->height;
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uint8_t x_position[] = {x / 2, (x + desc->width - 1) / 2};
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uint8_t y_position[] = {y, y + desc->height - 1};
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if (desc->pitch != desc->width) {
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LOG_ERR("Pitch is not width");
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return -EINVAL;
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}
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/* Following the datasheet, in the GDDRAM, two segment are split in one register */
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buf_len = MIN(desc->buf_size, desc->height * desc->width / 2);
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if (buf == NULL || buf_len == 0U) {
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LOG_ERR("Display buffer is not available");
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return -EINVAL;
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}
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if ((x & 1) != 0U) {
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LOG_ERR("Unsupported origin");
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return -EINVAL;
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}
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LOG_DBG("x %u, y %u, pitch %u, width %u, height %u, buf_len %u", x, y, desc->pitch,
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desc->width, desc->height, buf_len);
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err = config->write_cmd(dev, SSD1327_SET_COLUMN_ADDR, x_position, sizeof(x_position));
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if (err) {
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return err;
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}
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err = config->write_cmd(dev, SSD1327_SET_ROW_ADDR, y_position, sizeof(y_position));
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if (err) {
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return err;
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}
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return config->write_pixels(dev, buf, pixel_count, desc);
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}
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static int ssd1327_set_contrast(const struct device *dev, const uint8_t contrast)
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{
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const struct ssd1327_config *config = dev->config;
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return config->write_cmd(dev, SSD1327_SET_CONTRAST_CTRL, &contrast, 1);
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}
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static void ssd1327_get_capabilities(const struct device *dev, struct display_capabilities *caps)
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{
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const struct ssd1327_config *config = dev->config;
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memset(caps, 0, sizeof(struct display_capabilities));
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caps->x_resolution = config->width;
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caps->y_resolution = config->height;
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caps->supported_pixel_formats = PIXEL_FORMAT_L_8;
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caps->current_pixel_format = PIXEL_FORMAT_L_8;
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caps->screen_info = 0;
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}
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static int ssd1327_set_pixel_format(const struct device *dev, const enum display_pixel_format pf)
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{
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if (pf == PIXEL_FORMAT_L_8) {
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return 0;
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}
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LOG_ERR("Unsupported pixel format");
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return -ENOTSUP;
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}
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static int ssd1327_init_device(const struct device *dev)
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{
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const struct ssd1327_config *config = dev->config;
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uint8_t buf;
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int err;
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/* Turn display off */
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err = ssd1327_suspend(dev);
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if (err < 0) {
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return err;
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}
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err = ssd1327_set_display(dev);
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if (err < 0) {
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return err;
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}
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err = ssd1327_set_contrast(dev, CONFIG_SSD1327_DEFAULT_CONTRAST);
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if (err < 0) {
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return err;
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}
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err = ssd1327_set_hardware_config(dev);
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if (err < 0) {
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return err;
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}
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buf = (config->color_inversion ? SSD1327_SET_REVERSE_DISPLAY : SSD1327_SET_NORMAL_DISPLAY);
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err = config->write_cmd(dev, SSD1327_SET_ENTIRE_DISPLAY_OFF, &buf, 1);
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if (err < 0) {
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return err;
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}
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err = ssd1327_set_timing_setting(dev);
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if (err < 0) {
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return err;
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}
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err = ssd1327_resume(dev);
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if (err < 0) {
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return err;
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}
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return 0;
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}
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#if DT_HAS_COMPAT_ON_BUS_STATUS_OKAY(solomon_ssd1327fb, mipi_dbi)
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static int ssd1327_init(const struct device *dev)
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{
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const struct ssd1327_config *config = dev->config;
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int err;
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LOG_DBG("Initializing device");
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if (!device_is_ready(config->mipi_dev)) {
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LOG_ERR("MIPI Device not ready!");
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return -EINVAL;
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}
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err = mipi_dbi_reset(config->mipi_dev, SSD1327_RESET_DELAY);
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if (err < 0) {
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LOG_ERR("Failed to reset device!");
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return err;
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}
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k_msleep(SSD1327_RESET_DELAY);
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err = ssd1327_init_device(dev);
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if (err < 0) {
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LOG_ERR("Failed to initialize device! %d", err);
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return err;
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}
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return 0;
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}
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#endif
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#if DT_HAS_COMPAT_ON_BUS_STATUS_OKAY(solomon_ssd1327fb, i2c)
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static int ssd1327_init_i2c(const struct device *dev)
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{
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const struct ssd1327_config *config = dev->config;
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int err;
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LOG_DBG("Initializing device");
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if (!i2c_is_ready_dt(&config->i2c)) {
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LOG_ERR("I2C Device not ready!");
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return -EINVAL;
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}
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err = ssd1327_init_device(dev);
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if (err < 0) {
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LOG_ERR("Failed to initialize device! %d", err);
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return err;
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}
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return 0;
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}
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#endif
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static DEVICE_API(display, ssd1327_driver_api) = {
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.blanking_on = ssd1327_suspend,
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.blanking_off = ssd1327_resume,
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.write = ssd1327_write,
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.set_contrast = ssd1327_set_contrast,
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.get_capabilities = ssd1327_get_capabilities,
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.set_pixel_format = ssd1327_set_pixel_format,
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};
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#define SSD1327_WORD_SIZE(inst) \
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((DT_STRING_UPPER_TOKEN(inst, mipi_mode) == MIPI_DBI_MODE_SPI_4WIRE) ? SPI_WORD_SET(8) \
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: SPI_WORD_SET(9))
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#define SSD1327_CONV_BUFFER_SIZE(node_id) \
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DIV_ROUND_UP(DT_PROP(node_id, width) * CONFIG_SSD1327_CONV_BUFFER_LINES, 2)
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#define SSD1327_DEFINE_I2C(node_id) \
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static uint8_t conversion_buf##node_id[SSD1327_CONV_BUFFER_SIZE(node_id)]; \
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static struct ssd1327_data data##node_id; \
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static const struct ssd1327_config config##node_id = { \
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.i2c = I2C_DT_SPEC_GET(node_id), \
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.height = DT_PROP(node_id, height), \
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.width = DT_PROP(node_id, width), \
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.oscillator_freq = DT_PROP(node_id, oscillator_freq), \
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.display_offset = DT_PROP(node_id, display_offset), \
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.start_line = DT_PROP(node_id, start_line), \
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.multiplex_ratio = DT_PROP(node_id, multiplex_ratio), \
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.prechargep = DT_PROP(node_id, prechargep), \
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.remap_value = DT_PROP(node_id, remap_value), \
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.color_inversion = DT_PROP(node_id, inversion_on), \
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.phase_length = DT_PROP(node_id, phase_length), \
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.function_selection_b = DT_PROP(node_id, function_selection_b), \
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.precharge_voltage = DT_PROP(node_id, precharge_voltage), \
|
|
.vcomh_voltage = DT_PROP(node_id, vcomh_voltage), \
|
|
.write_cmd = ssd1327_write_bus_cmd_i2c, \
|
|
.write_pixels = ssd1327_write_pixels_i2c, \
|
|
.conversion_buf = conversion_buf##node_id, \
|
|
.conversion_buf_size = sizeof(conversion_buf##node_id), \
|
|
}; \
|
|
\
|
|
DEVICE_DT_DEFINE(node_id, ssd1327_init_i2c, NULL, &data##node_id, &config##node_id, \
|
|
POST_KERNEL, CONFIG_DISPLAY_INIT_PRIORITY, &ssd1327_driver_api);
|
|
|
|
#define SSD1327_DEFINE_MIPI(node_id) \
|
|
static uint8_t conversion_buf##node_id[SSD1327_CONV_BUFFER_SIZE(node_id)]; \
|
|
static struct ssd1327_data data##node_id; \
|
|
static const struct ssd1327_config config##node_id = { \
|
|
.mipi_dev = DEVICE_DT_GET(DT_PARENT(node_id)), \
|
|
.dbi_config = MIPI_DBI_CONFIG_DT( \
|
|
node_id, SSD1327_WORD_SIZE(node_id) | SPI_OP_MODE_MASTER, 0), \
|
|
.height = DT_PROP(node_id, height), \
|
|
.width = DT_PROP(node_id, width), \
|
|
.oscillator_freq = DT_PROP(node_id, oscillator_freq), \
|
|
.display_offset = DT_PROP(node_id, display_offset), \
|
|
.start_line = DT_PROP(node_id, start_line), \
|
|
.multiplex_ratio = DT_PROP(node_id, multiplex_ratio), \
|
|
.prechargep = DT_PROP(node_id, prechargep), \
|
|
.remap_value = DT_PROP(node_id, remap_value), \
|
|
.color_inversion = DT_PROP(node_id, inversion_on), \
|
|
.phase_length = DT_PROP(node_id, phase_length), \
|
|
.function_selection_b = DT_PROP(node_id, function_selection_b), \
|
|
.precharge_voltage = DT_PROP(node_id, precharge_voltage), \
|
|
.vcomh_voltage = DT_PROP(node_id, vcomh_voltage), \
|
|
.write_cmd = ssd1327_write_bus_cmd_mipi, \
|
|
.write_pixels = ssd1327_write_pixels_mipi, \
|
|
.conversion_buf = conversion_buf##node_id, \
|
|
.conversion_buf_size = sizeof(conversion_buf##node_id), \
|
|
}; \
|
|
\
|
|
DEVICE_DT_DEFINE(node_id, ssd1327_init, NULL, &data##node_id, &config##node_id, \
|
|
POST_KERNEL, CONFIG_DISPLAY_INIT_PRIORITY, &ssd1327_driver_api);
|
|
|
|
#define SSD1327_DEFINE(node_id) \
|
|
COND_CODE_1(DT_ON_BUS(node_id, i2c), \
|
|
(SSD1327_DEFINE_I2C(node_id)), (SSD1327_DEFINE_MIPI(node_id)))
|
|
|
|
DT_FOREACH_STATUS_OKAY(solomon_ssd1327fb, SSD1327_DEFINE)
|