63c24d9d34
Update the NEORV32 SoC, peripheral drivers, and board to support NEORV32 v1.11.1. Notable changes include: - Optional RISC-V ISA Kconfigs are now selected on the board level. - Peripheral registers are now automatically reset in hardware, no need for software initialization code. - The NEORV32 GPIO controller now supports 32 pins, not 64. Interrupt support will be submitted in a separate PR. - Default board configuration has 64k RAM and is clocked at 18 MHz. Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk> |
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| .. | ||
| arc/synopsys | ||
| arm | ||
| arm64 | ||
| bindings | ||
| common | ||
| nios2/intel | ||
| posix | ||
| riscv | ||
| sparc/gaisler | ||
| x86/intel | ||
| xtensa | ||
| binding-template.yaml | ||
| Kconfig | ||