zephyr/dts/bindings/timer/andestech,machine-timer.yaml
Gerard Marull-Paretas 00f51eff4e dts: riscv: andes: define machine timer
Define machine timer in Devicetree.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-08-02 09:12:31 +02:00

20 lines
357 B
YAML

# Copyright (c) 2022 Nordic Semiconductor ASA
# SPDX-License-Identifier: Apache-2.0
description: |
Andes Machine Timer
The Andes machine timer provides RISC-V privileged mtime and mtimecmp
registers.
compatible: "andestech,machine-timer"
include: base.yaml
properties:
reg:
required: true
interrupts-extended:
required: true