zephyr/drivers/timer/Kconfig.riscv_machine
Filip Kokosinski 70c978bb97 soc/riscv/sifive-freedom/fe310: use correct SYS_CLOCK_HW_CYCLES_PER_SEC
This commit introduces changes in three places in order to fix the
problem with timer-related tests on FE310-based boards:
* tests/kernel/sleep/kernel.common.timing
* tests/kernel/tickless/tickless_concept/kernel.tickless.concept
* tests/kernel/workq/work_queue/kernel.workqueue

The first change is the modification of the SYS_CLOCK_HW_CYCLES_PER_SEC
value back to 32768 Hz to match FE310's datasheet description.

The second change is CLINT frequency reduction in Renode simulation
model to 16 MHz to correspond with the oscillator frequency given by the
FE310's datasheet and the HiFive1 board schematic. This fixes the first
two tests.

The last change is reducing the MIN_DELAY define to 100. This causes the
RISC-V machine timer driver to update the mtimecmp register more often,
which in turn addresses the `work_queue/kernel.workqueue` problem with
work items finishing prematurely, causing the above-mentioned test to
fail.

Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
2022-05-24 08:58:43 -07:00

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# Copyright (c) 2014-2015 Wind River Systems, Inc.
# Copyright (c) 2016 Cadence Design Systems, Inc.
# Copyright (c) 2019 Intel Corp.
# SPDX-License-Identifier: Apache-2.0
config RISCV_MACHINE_TIMER
bool "RISCV Machine Timer"
depends on SOC_FAMILY_RISCV_PRIVILEGE
select TICKLESS_CAPABLE
select TIMER_HAS_64BIT_CYCLE_COUNTER
help
This module implements a kernel device driver for the generic RISCV machine
timer driver. It provides the standard "system clock driver" interfaces.
config RISCV_MACHINE_TIMER_SYSTEM_CLOCK_DIVIDER
int
default 0
help
Specifies the division ratio of the system clock supplied to the Machine Timer.
A clock obtained by dividing the system clock by a value of [2^N] is
supplied to the timer. Where N is this parameter's value.
When N=2, it is divided by 4, and when N=5, it is divided by 32.
Default case is N=0, this means use system clock as machine timer clock.
It is normal configuration for RISC-V machine clock.
This parameter usually depends on the hardware configuration.
The division ratio should define in devicetree,
and it is desirable usage that references it with using a function such as
dt_node_int_prop_int from Kconfig. (Tune in the conf file is not preferable.)
config RISCV_MACHINE_TIMER_MIN_DELAY
int
default 100
help
Specifies the minimum number of machine cycles before the RISC-V machine
time compare register is allowed to be updated by the RISC-V machine timer
driver.