ac74d8b652
Replace the existing Apache 2.0 boilerplate header with an SPDX tag throughout the zephyr code tree. This patch was generated via a script run over the master branch. Also updated doc/porting/application.rst that had a dependency on line numbers in a literal include. Manually updated subsys/logging/sys_log.c that had a malformed header in the original file. Also cleanup several cases that already had a SPDX tag and we either got a duplicate or missed updating. Jira: ZEP-1457 Change-Id: I6131a1d4ee0e58f5b938300c2d2fc77d2e69572c Signed-off-by: David B. Kinder <david.b.kinder@intel.com> Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
55 lines
1.9 KiB
C
55 lines
1.9 KiB
C
/*
|
|
* Copyright (c) 2016 Open-RnD Sp. z o.o.
|
|
*
|
|
* SPDX-License-Identifier: Apache-2.0
|
|
*/
|
|
#ifndef _STM32F1_CLOCK_CONTROL_H_
|
|
#define _STM32F1_CLOCK_CONTROL_H_
|
|
|
|
/**
|
|
* @file
|
|
*
|
|
* @brief Clock subsystem IDs for STM32F1 family
|
|
*/
|
|
|
|
enum {
|
|
/* APB1 */
|
|
STM32F10X_CLOCK_SUBSYS_TIM2 = 1 << 0,
|
|
STM32F10X_CLOCK_SUBSYS_TIM3 = 1 << 1,
|
|
STM32F10X_CLOCK_SUBSYS_TIM4 = 1 << 2,
|
|
STM32F10X_CLOCK_SUBSYS_TIM5 = 1 << 3,
|
|
STM32F10X_CLOCK_SUBSYS_TIM6 = 1 << 4,
|
|
STM32F10X_CLOCK_SUBSYS_TIM7 = 1 << 5,
|
|
STM32F10X_CLOCK_SUBSYS_WWDG = 1 << 11,
|
|
STM32F10X_CLOCK_SUBSYS_SPI2 = 1 << 14,
|
|
STM32F10X_CLOCK_SUBSYS_SPI3 = 1 << 15,
|
|
STM32F10X_CLOCK_SUBSYS_USART2 = 1 << 17,
|
|
STM32F10X_CLOCK_SUBSYS_USART3 = 1 << 18,
|
|
STM32F10X_CLOCK_SUBSYS_UART4 = 1 << 19,
|
|
STM32F10X_CLOCK_SUBSYS_UART5 = 1 << 20,
|
|
STM32F10X_CLOCK_SUBSYS_I2C1 = 1 << 21,
|
|
STM32F10X_CLOCK_SUBSYS_I2C2 = 1 << 22,
|
|
STM32F10X_CLOCK_SUBSYS_CAN1 = 1 << 25,
|
|
STM32F10X_CLOCK_SUBSYS_CAN2 = 1 << 26,
|
|
STM32F10X_CLOCK_SUBSYS_BKP = 1 << 27,
|
|
STM32F10X_CLOCK_SUBSYS_PWR = 1 << 28,
|
|
STM32F10X_CLOCK_SUBSYS_DAC = 1 << 29,
|
|
|
|
STM32F10X_CLOCK_APB2_BASE = 1 << 31,
|
|
/* APB2 */
|
|
STM32F10X_CLOCK_SUBSYS_AFIO = STM32F10X_CLOCK_APB2_BASE | 1 << 0,
|
|
STM32F10X_CLOCK_SUBSYS_IOPA = STM32F10X_CLOCK_APB2_BASE | 1 << 2,
|
|
STM32F10X_CLOCK_SUBSYS_IOPB = STM32F10X_CLOCK_APB2_BASE | 1 << 3,
|
|
STM32F10X_CLOCK_SUBSYS_IOPC = STM32F10X_CLOCK_APB2_BASE | 1 << 4,
|
|
STM32F10X_CLOCK_SUBSYS_IOPD = STM32F10X_CLOCK_APB2_BASE | 1 << 5,
|
|
STM32F10X_CLOCK_SUBSYS_IOPE = STM32F10X_CLOCK_APB2_BASE | 1 << 6,
|
|
STM32F10X_CLOCK_SUBSYS_ADC1 = STM32F10X_CLOCK_APB2_BASE | 1 << 9,
|
|
STM32F10X_CLOCK_SUBSYS_ADC2 = STM32F10X_CLOCK_APB2_BASE | 1 << 10,
|
|
STM32F10X_CLOCK_SUBSYS_TIM1 = STM32F10X_CLOCK_APB2_BASE | 1 << 11,
|
|
STM32F10X_CLOCK_SUBSYS_SPI1 = STM32F10X_CLOCK_APB2_BASE | 1 << 12,
|
|
STM32F10X_CLOCK_SUBSYS_USART1 = STM32F10X_CLOCK_APB2_BASE | 1 << 14,
|
|
|
|
};
|
|
|
|
#endif /* _STM32F1_CLOCK_CONTROL_H_ */
|