zephyr/include/arch
Kumar Gala 339e3f79eb riscv: linker: replace DT_FLASH_{BASE_ADDRESS,SIZE} with new macros
The riscv linker scripts utilize DT_FLASH_BASE_ADDRESS and
DT_FLASH_SIZE, as we want to phase out the old generator we need to
replace these defines with macros from devicetree.h.

We support two flash configurations at this point, either a QSPI flash
like on the hifive board or a SoC flash like on the rv32m1_vega.  We
update the linker scripts to check the compat of the zephyr,flash node
and based on if its 'jedec,spi-nor' or 'soc-nv-flash' we determine how
to extract the "flash" base address and size.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-05-05 09:23:32 -05:00
..
arc soc: arc: Use new dts macros in linker scripts and arc_mpu_regions 2020-04-30 13:29:48 -05:00
arm arm: linker.ld: move bss section to ram end 2020-05-04 18:46:40 +02:00
common sys_io: pull in toolchain.h 2019-10-09 09:14:18 -04:00
nios2 kernel: add Z_STACK_PTR_ALIGN ARCH_STACK_PTR_ALIGN 2020-04-21 18:45:45 -04:00
posix kernel: add Z_STACK_PTR_ALIGN ARCH_STACK_PTR_ALIGN 2020-04-21 18:45:45 -04:00
riscv riscv: linker: replace DT_FLASH_{BASE_ADDRESS,SIZE} with new macros 2020-05-05 09:23:32 -05:00
x86 x86: Cleanup linker scripts to use new DTS macros 2020-04-30 08:37:18 -05:00
xtensa arch: xtensa: replace DT_CPU_CLOCK_FREQUENCY with new dt macros 2020-04-22 11:38:33 -05:00
arch_inlines.h headers: Refactor kernel and arch headers. 2019-11-06 16:07:32 -08:00
cpu.h arch: arm64: Introduce ARM64 (AArch64) architecture 2020-02-01 08:08:43 -05:00
syscall.h x86: add system call functions for 64-bit 2020-01-13 16:35:10 -05:00