Kumar Gala a574957c74 soc: xtensa: intel_adsp: ace: set number of cpus at boot ... We look at the Intra DSP communications capability register (DFIDCCP) to determine the number of cores. There might be a better way to determine the number of cores, but this works for now. Signed-off-by: Kumar Gala <kumar.gala@intel.com>		2022-11-03 16:43:53 -04:00
..
arc	smp: Kconfig: Move to using MP_MAX_NUM_CPUS	2022-10-20 22:04:10 +09:00
arm	ARM: nxp_imx: rt10xx: migrate ARM, AHB and IPG dividers to DT	2022-11-02 17:17:27 -05:00
arm64	boards: fvp_baser_aemv8r: remove SOC_FVP_AEMV8R_EL2_INIT code	2022-10-12 18:46:49 +09:00
mips	asm: update files with <zephyr/...> include prefix	2022-05-09 12:45:29 -04:00
nios2	linker: update files with <zephyr/...> include prefix	2022-05-09 12:45:29 -04:00
posix	cmake: Update CONFIG_ASAN support	2022-08-19 08:30:01 +02:00
riscv	it8xxx2: support relocating ISR code to RAM	2022-10-21 20:31:47 +02:00
sparc	linker: update files with <zephyr/...> include prefix	2022-05-09 12:45:29 -04:00
x86	soc: raptor_lake: Cleanup CMakeLists	2022-10-25 09:50:15 -05:00
xtensa	soc: xtensa: intel_adsp: ace: set number of cpus at boot	2022-11-03 16:43:53 -04:00
Kconfig	soc: Add ability for SOC to specify runtime CPU detection	2022-11-03 16:43:53 -04:00