a1188a96ff
Using the address of RDR/TDR for fifo base address computation
has the same effect as using the FSL_FEATURE_SAI_{TX/RX}_FIFO_BASEn
macro from NXP HAL. The only difference between the two is that
the macro is not defined for all SoCs so whenever we introduce
a new SoC that uses the SAI module we have to also introduce
the macro for said SoC. Using TDR/RDR has the advantage that
it doesn't require any additional changes to the NXP HAL.
Since we only support one data line per direction, it's fine
to just use RDR[0] and TDR[0] for the address computation.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
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| .. | ||
| intel | ||
| nxp/sai | ||
| CMakeLists.txt | ||
| Kconfig | ||