zephyr/dts/riscv
Kevin Wang 3744fe2d49 drivers: mbox: Add Andestech mailbox driver
Support the Andes mailbox driver via software plic.

Signed-off-by: Kevin Wang <kevinwang821020@google.com>
2023-07-26 10:51:41 +02:00
..
andes drivers: mbox: Add Andestech mailbox driver 2023-07-26 10:51:41 +02:00
efinix dts: riscv: add a initial SoC dtsi for Efinix Sapphire SoC 2023-06-27 12:09:57 +00:00
espressif/esp32c3 dts: riscv: esp32c3 rework soc/sip list 2023-07-25 18:12:33 +02:00
gigadevice dts: Add missing adc dt-bindings include 2023-04-20 10:48:33 +02:00
ite pm: power-states node needs to be a child of cpus 2023-07-25 09:16:14 +02:00
lowrisc dts: riscv: lowrisc: Add pwrmgr node to OpenTitan Earlgrey devicetree 2023-05-26 09:45:25 -04:00
microchip dts: riscv: introduce PolarFire SoC I2C interface 2023-06-23 12:31:36 -04:00
niosv dts: riscv: Add dts support for INTEL Nios V/g 2023-06-17 07:34:05 -04:00
openisa
sifive dts: riscv: sifive: fu740: add more cpus 2023-04-12 13:06:29 +02:00
starfive
telink dts: riscv: telink: add DT entry for machine timer 2022-08-02 09:12:31 +02:00
neorv32.dtsi dts: riscv: neorv32: define machine timer 2022-08-02 09:12:31 +02:00
riscv32-litex-vexriscv.dtsi
virt.dtsi