zephyr/boards/xtensa
Marek Matej 6b57b3b786 soc: xtensa,riscv: esp32xx: refactor folder structure
Refactor the ESP32 target SOCs together with
all related boards. Most braking changes includes:

- changing the CONFIG_SOC_ESP32* to refer to
  the actual soc line (esp32,esp32s2,esp32s3,esp32c3)
- replacing CONFIG_SOC with the CONFIG_SOC_SERIES
- creating CONFIG_SOC_FAMILY_ESP32 to embrace all
  the ESP32 across all used architectures
- introducing CONFIG_SOC_PART_NUMBER_* to
  provide a SOC model config
- introducing the 'common' folder to hide all
  commonly used configs and files.
- updating west.yml to reflect previous changes in hal

Signed-off-by: Marek Matej <marek.matej@espressif.com>
2023-07-25 18:12:33 +02:00
..
esp32_devkitc_wroom soc: xtensa,riscv: esp32xx: refactor folder structure 2023-07-25 18:12:33 +02:00
esp32_devkitc_wrover soc: xtensa,riscv: esp32xx: refactor folder structure 2023-07-25 18:12:33 +02:00
esp32_ethernet_kit soc: xtensa,riscv: esp32xx: refactor folder structure 2023-07-25 18:12:33 +02:00
esp32_net soc: xtensa,riscv: esp32xx: refactor folder structure 2023-07-25 18:12:33 +02:00
esp32s2_franzininho soc: xtensa,riscv: esp32xx: refactor folder structure 2023-07-25 18:12:33 +02:00
esp32s2_saola soc: xtensa,riscv: esp32xx: refactor folder structure 2023-07-25 18:12:33 +02:00
esp32s3_devkitm soc: xtensa,riscv: esp32xx: refactor folder structure 2023-07-25 18:12:33 +02:00
esp_wrover_kit soc: xtensa,riscv: esp32xx: refactor folder structure 2023-07-25 18:12:33 +02:00
heltec_wifi_lora32_v2 soc: xtensa,riscv: esp32xx: refactor folder structure 2023-07-25 18:12:33 +02:00
intel_adsp_ace15_mtpm boards: xtensa: Set DCACHE_LINE_SIZE for all SOF-supported Intel SoCs 2023-05-17 18:34:24 -04:00
intel_adsp_ace20_lnl boards: intel_adsp_ace20_lnl: build with Zephyr SDK 2023-05-17 18:58:54 -04:00
intel_adsp_cavs25 boards/xtensa: Skip cleaning intermediate binaries up 2023-07-19 20:46:51 -04:00
m5stickc_plus soc: xtensa,riscv: esp32xx: refactor folder structure 2023-07-25 18:12:33 +02:00
nxp_adsp_imx8 boards/xtensa: Skip cleaning intermediate binaries up 2023-07-19 20:46:51 -04:00
nxp_adsp_imx8m boards/xtensa: Skip cleaning intermediate binaries up 2023-07-19 20:46:51 -04:00
nxp_adsp_imx8x boards/xtensa: Skip cleaning intermediate binaries up 2023-07-19 20:46:51 -04:00
odroid_go soc: xtensa,riscv: esp32xx: refactor folder structure 2023-07-25 18:12:33 +02:00
olimex_esp32_evb soc: xtensa,riscv: esp32xx: refactor folder structure 2023-07-25 18:12:33 +02:00
qemu_xtensa yamllint: indentation: fix files in boards/ 2023-01-04 14:23:53 +01:00
xiao_esp32s3 soc: xtensa,riscv: esp32xx: refactor folder structure 2023-07-25 18:12:33 +02:00
xt-sim
index.rst docs: boards: fix capitalization of board architectures 2023-07-06 09:15:59 +02:00