zephyr/arch/xtensa/core
Marek Matej 6b57b3b786 soc: xtensa,riscv: esp32xx: refactor folder structure
Refactor the ESP32 target SOCs together with
all related boards. Most braking changes includes:

- changing the CONFIG_SOC_ESP32* to refer to
  the actual soc line (esp32,esp32s2,esp32s3,esp32c3)
- replacing CONFIG_SOC with the CONFIG_SOC_SERIES
- creating CONFIG_SOC_FAMILY_ESP32 to embrace all
  the ESP32 across all used architectures
- introducing CONFIG_SOC_PART_NUMBER_* to
  provide a SOC model config
- introducing the 'common' folder to hide all
  commonly used configs and files.
- updating west.yml to reflect previous changes in hal

Signed-off-by: Marek Matej <marek.matej@espressif.com>
2023-07-25 18:12:33 +02:00
..
include xtensa: mmu: Initial implementation 2023-05-23 08:54:29 +02:00
offsets xtensa: add some structs for interrupt stack frames 2023-04-20 04:45:52 -04:00
startup
CMakeLists.txt xtensa: mmu: Initial implementation 2023-05-23 08:54:29 +02:00
coredump.c soc: xtensa,riscv: esp32xx: refactor folder structure 2023-07-25 18:12:33 +02:00
cpu_idle.c xtensa: set no optimization for arch_cpu_idle() with xt-clang 2023-07-24 11:07:30 -04:00
crt1.S
debug_helpers_asm.S xtensa: add some structs for interrupt stack frames 2023-04-20 04:45:52 -04:00
fatal.c xtensa: limit speical exit() to XT_SIMULATOR 2023-05-08 09:59:54 +02:00
gdbstub.c xtensa: add some structs for interrupt stack frames 2023-04-20 04:45:52 -04:00
gen_zsr.py xtensa: gen_zsr: add _STR for extra registers 2023-05-23 08:54:29 +02:00
irq_manage.c
irq_offload.c include: add missing zephyr/irq.h include 2022-10-17 22:57:39 +09:00
README-WINDOWS.rst
timing.c includes: prefer <zephyr/kernel.h> over <zephyr/zephyr.h> 2022-09-05 16:31:47 +02:00
tls.c
window_vectors.S
xcc_stubs.c
xtensa_backtrace.c soc: xtensa,riscv: esp32xx: refactor folder structure 2023-07-25 18:12:33 +02:00
xtensa_intgen.py
xtensa_intgen.tmpl
xtensa_mmu.c xtensa: mmu: always map data TLB for VECBASE 2023-05-23 08:54:29 +02:00
xtensa-asm2-util.S xtensa: mmu: handle TLB misses in C exception handler 2023-05-23 08:54:29 +02:00
xtensa-asm2.c xtensa: allow arch-specific arch_spin_relax() with more NOPs 2023-07-20 10:47:47 +00:00