cbf867ff2c
We add a serial UART driver for Microchip MEC5 HAL based chips. The driver supports polling, interrupts, and runtime configuration features. Power management will be implemented in a future PR. Signed-off-by: Scott Worley <scott.worley@microchip.com>
56 lines
1.5 KiB
YAML
56 lines
1.5 KiB
YAML
# Copyright (c) 2024 Microchip Technology Inc.
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# SPDX-License-Identifier: Apache-2.0
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description: Microchip MEC5 UART
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compatible: "microchip,mec5-uart"
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include: [uart-controller.yaml, pinctrl-device.yaml]
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properties:
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reg:
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required: true
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interrupts:
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required: true
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pinctrl-0:
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required: true
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pinctrl-names:
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required: true
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fifo-mode-disable:
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type: boolean
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description: |
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Disable 16550 FIFO mode. Both 16-byte TX and RX FIFOs will be
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disabled. UART will revert to a one byte holding register for
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TX and RX.
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rx-fifo-trig:
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type: string
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default: "8"
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description: |
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RX FIFO byte count trigger limit. When the number of received bytes
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reaches this level the UART will signal an interrupt if enabled.
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enum:
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- "1"
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- "4"
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- "8"
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- "14"
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use-extclk:
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type: boolean
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description: |
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Optional source of an external UART clock. If present the
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driver will use this pin as the UART input clock source.
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The pin should have a 1.8432 MHz clock waveform for normal
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UART BAUD rates or 48 MHz for high speed BAUD rates.
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Refer to data sheet for the pin(s) available as external UART
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clock input. The pin should be added to the default PINCTRL list.
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Example using external 1.8432MHz clock on MEC5 external UART clock pin.
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clock-frequency = <1843200>;
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pinctrl-0 = < &uart1_tx_gpio170 &uart1_tx_gpio171 &uart_clk_gpio025>;
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pinctrl-names = "default";
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