The Atmel SAM0 SoC enable peripherals clocks in distinct places: PM and MCLK. The old devices had defined the peripheral clock enable bit at PM. On the newer devices this was extracted on a dedicated memory section called Master Clock (MCLK). This change excludes the dedicated bindings in favor of a generic approach that cover all cases. Now the clocks properties is complemented by the atmel,assigned-clocks property. It gives the liberty to user to customize the clock source from a generic clock or configure the direct connections. All peripherals drivers were reworked with the newer solution. Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
64 lines
1.4 KiB
Plaintext
64 lines
1.4 KiB
Plaintext
/*
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* Copyright (c) 2020 Stephanos Ioannidis <root@stephanos.io>
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* Copyright (c) 2023 Sebastian Schlupp
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* Copyright (c) 2024 Gerson Fernando Budke <nandojve@gmail.com>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <atmel/samd5x.dtsi>
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/ {
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soc {
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gmac: ethernet@42000800 {
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compatible = "atmel,sam0-gmac";
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reg = <0x42000800 0x400>;
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interrupts = <84 0>;
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interrupt-names = "gmac";
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status = "disabled";
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num-queues = <1>;
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local-mac-address = [00 00 00 00 00 00];
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};
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mdio: mdio@42000800 {
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compatible = "atmel,sam-mdio";
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reg = <0x42000800 0x400>;
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status = "disabled";
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#address-cells = <1>;
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#size-cells = <0>;
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};
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can0: can@42000000 {
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compatible = "atmel,sam0-can";
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reg = <0x42000000 0x400>;
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interrupts = <78 0>, <78 0>;
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interrupt-names = "int0", "int1";
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clocks = <&gclk 27>, <&mclk 0x10 17>;
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clock-names = "GCLK", "MCLK";
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atmel,assigned-clocks = <&gclk 0>;
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atmel,assigned-clock-names = "GCLK";
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status = "disabled";
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bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
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divider = <12>;
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};
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can1: can@42000400 {
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compatible = "atmel,sam0-can";
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reg = <0x42000400 0x400>;
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interrupts = <79 0>, <79 0>;
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interrupt-names = "int0", "int1";
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clocks = <&gclk 28>, <&mclk 0x10 18>;
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clock-names = "GCLK", "MCLK";
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atmel,assigned-clocks = <&gclk 0>;
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atmel,assigned-clock-names = "GCLK";
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status = "disabled";
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bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
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divider = <12>;
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};
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};
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};
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