3f5f981f16
Fixes: commit 5f4b51f9b1 ("soc: intel_adsp: add a debug window slot
descriptor") - restore the maximum debug slot number. The added slot
resides in page 0, not at the end of the array. The bug didn't have
any run-time implications - no access to those high index value slots
is performed, all platforms so far have 3 slots at most, so this is a
pure correctness fix.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
87 lines
2.6 KiB
C
87 lines
2.6 KiB
C
/* Copyright (c) 2021 Intel Corporation
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef _ZEPHYR_SOC_INTEL_ADSP_DEBUG_WINDOW
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#define _ZEPHYR_SOC_INTEL_ADSP_DEBUG_WINDOW
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#include <mem_window.h>
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#include <zephyr/debug/sparse.h>
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#include <zephyr/cache.h>
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/*
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* SRAM window for debug info (window 2) is organized in slots,
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* described in the descriptors available on page 0.
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*
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* ------------------------
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* | Page0 - descriptors |
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* ------------------------
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* | Page1 - slot0 |
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* ------------------------
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* | Page2 - slot1 |
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* ------------------------
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* | ... |
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* ------------------------
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* | Page14 - slot13 |
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* ------------------------
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* | Page15 - slot14 |
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* ------------------------
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*
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* The slot size == page size
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*
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* The first page contains descriptors for the remaining slots.
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* The overall number of slots can vary based on platform.
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*
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* The slot descriptor is:
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* u32 res_id;
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* u32 type;
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* u32 vma;
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*/
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#define ADSP_DW_PAGE_SIZE 0x1000
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#define ADSP_DW_SLOT_SIZE ADSP_DW_PAGE_SIZE
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#define ADSP_DW_SLOT_COUNT 15
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#define ADSP_DW_DESC_COUNT (ADSP_DW_SLOT_COUNT + 1)
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/* debug window slots usage, mutually exclusive options can reuse slots */
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#define ADSP_DW_SLOT_NUM_SHELL 0
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#define ADSP_DW_SLOT_NUM_MTRACE 0
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#define ADSP_DW_SLOT_NUM_TRACE 1
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#define ADSP_DW_SLOT_NUM_TELEMETRY 1
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/* this uses remaining space in the first page after descriptors */
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#define ADSP_DW_SLOT_NUM_GDB (ADSP_DW_DESC_COUNT - 1)
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/* debug log slot types */
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#define ADSP_DW_SLOT_UNUSED 0x00000000
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#define ADSP_DW_SLOT_CRITICAL_LOG 0x54524300
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#define ADSP_DW_SLOT_DEBUG_LOG 0x474f4c00 /* byte 0: core ID */
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#define ADSP_DW_SLOT_GDB_STUB 0x42444700
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#define ADSP_DW_SLOT_TELEMETRY 0x4c455400
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#define ADSP_DW_SLOT_TRACE 0x54524143
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#define ADSP_DW_SLOT_SHELL 0x73686c6c
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#define ADSP_DW_SLOT_DEBUG_STREAM 0x53523134
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#define ADSP_DW_SLOT_BROKEN 0x44414544
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/* for debug and critical types */
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#define ADSP_DW_SLOT_CORE_MASK GENMASK(7, 0)
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#define ADSP_DW_SLOT_TYPE_MASK GENMASK(31, 8)
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struct adsp_dw_desc {
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uint32_t resource_id;
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uint32_t type;
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uint32_t vma;
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} __packed;
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struct adsp_debug_window {
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struct adsp_dw_desc descs[ADSP_DW_DESC_COUNT];
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uint8_t reserved[ADSP_DW_SLOT_SIZE - ADSP_DW_DESC_COUNT * sizeof(struct adsp_dw_desc)];
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uint8_t slots[ADSP_DW_SLOT_COUNT][ADSP_DW_SLOT_SIZE];
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} __packed;
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#define WIN2_MBASE DT_REG_ADDR(DT_PHANDLE(DT_NODELABEL(mem_window2), memory))
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#define ADSP_DW ((volatile struct adsp_debug_window *) \
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(sys_cache_uncached_ptr_get((__sparse_force void __sparse_cache *) \
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(WIN2_MBASE + WIN2_OFFSET))))
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#endif
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