zephyr/soc/intel/intel_adsp/cavs
William Tambe abeccfec28 xtensa: support for more than 32 interrupts
This change add support for using more than 32 interrupts.

Signed-off-by: William Tambe <williamt@cadence.com>
2025-06-27 08:59:56 -10:00
..
include
_soc_inthandlers.h xtensa: support for more than 32 interrupts 2025-06-27 08:59:56 -10:00
asm_ldo_management.h
asm_memory_management.h
CMakeLists.txt intel_adsp: cavs: add gdb support 2025-06-23 12:32:44 -07:00
gdbstub.c intel_adsp: cavs: add gdb support 2025-06-23 12:32:44 -07:00
irq.c
Kconfig intel_adsp: cavs: add gdb support 2025-06-23 12:32:44 -07:00
Kconfig.defconfig.cavs_v25
Kconfig.defconfig.series intel_adsp: cavs: add gdb support 2025-06-23 12:32:44 -07:00
Kconfig.soc
multiprocessing.c
power_down_cavs.S
power.c
sram.c