3112f856d2
Currently, the only available platform is Nitrogen, featuring a VexRiscv CPU that boots from external SPI flash and runs code from external HyperRAM. Signed-off-by: Daniel Schultz <dnltz@aesc-silicon.de>
8 lines
131 B
Plaintext
8 lines
131 B
Plaintext
/*
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* Copyright (c) 2025 Aesc Silicon
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/arch/riscv/common/linker.ld>
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