Benjamin Cabé b3def01353 dts: bindings: ensure bindings have .yaml extension (not .yml) ... Strictly speaking not a problem for in-tree tooling, but better to have all binding files follow the same naming convention. Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>		2025-06-26 11:03:36 -05:00
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andes,andescore-v5.yaml
arm,cortex-a53.yaml
arm,cortex-a55.yaml
arm,cortex-a72.yaml
arm,cortex-a76.yaml
arm,cortex-m0.yaml
arm,cortex-m0+.yaml
arm,cortex-m1.yaml
arm,cortex-m3.yaml
arm,cortex-m4.yaml
arm,cortex-m4f.yaml
arm,cortex-m7.yaml
arm,cortex-m23.yaml
arm,cortex-m33.yaml
arm,cortex-m33f.yaml
arm,cortex-m55.yaml
arm,cortex-m55f.yaml
arm,cortex-m85.yaml
arm,cortex-m85f.yaml
arm,cortex-m.yaml
arm,cortex-r4.yaml
arm,cortex-r4f.yaml
arm,cortex-r5.yaml
arm,cortex-r5f.yaml
arm,cortex-r7.yaml
arm,cortex-r8.yaml	dts: bindings: Add CPU device bindings for Cortex-R8	2025-06-24 14:22:43 +02:00
arm,cortex-r52.yaml
arm,cortex-r82.yaml
cdns,tensilica-xtensa-lx3.yaml
cdns,tensilica-xtensa-lx4.yaml
cdns,tensilica-xtensa-lx6.yaml
cdns,tensilica-xtensa-lx7.yaml
cpu.yaml
efinix,vexriscv-sapphire.yaml
espressif,riscv.yaml
espressif,xtensa-lx6.yaml
espressif,xtensa-lx7.yaml
gaisler,leon3.yaml
intel,alder-lake.yaml
intel,apollo-lake.yaml
intel,bartlett-lake.yaml
intel,elkhart-lake.yaml
intel,ish.yaml
intel,lakemont.yaml
intel,niosv.yaml
intel,raptor-lake.yaml
intel,x86.yaml
ite,riscv-ite.yaml
litex,vexriscv-standard.yaml
lowrisc,ibex.yaml
neorv32,cpu.yaml
nordic,vpr.yaml
nuclei,bumblebee.yaml
openhwgroup,cva6.yaml
openisa,ri5cy.yaml
openisa,zero-ri5cy.yaml
qemu,riscv-virt.yaml
renesas,rx.yaml	goc: renesas: rx: Initial support for RX130 SOC	2025-05-02 09:18:16 +02:00
riscv,cpus.yaml
sample_controller.yaml
sensry,ganymed-sy1xx.yaml
sifive-common.yaml
sifive,e24.yaml
sifive,e31.yaml
sifive,e51.yaml
sifive,s7.yaml
sifive,u54.yaml
snps,arcem.yaml
telink,b91.yaml
wch,qingke-v2.yaml
wch,qingke-v4b.yaml	dts: bindings: ensure bindings have .yaml extension (not .yml)	2025-06-26 11:03:36 -05:00
wch,qingke-v4c.yaml
wch,qingke-v4f.yaml	soc: Add support for the WCH CH32V303	2025-05-24 18:03:53 +02:00
zephyr,native-posix-cpu.yaml
zephyr,native-sim-cpu.yaml