zephyr/dts/arm/st/wb
Francois Ramu aac2c5c568 dts: arm: stm32 reg definition for the st,stm32-qspi compatible
The st,stm32-qspi compatible is defining the reg property
with the register address and size at first index
followed by the external mem base address and max allocated size.
For the stm32F412, stm32F7, stm32L4, stm32H7, stm32WB series.
qspi is addressing max 256 MBytes from 0x90000000.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2025-06-24 09:13:33 +02:00
..
stm32wb55.dtsi
stm32wb55Xg.dtsi soc: st: common: Rename STM32_PWR_WKUP_PIN_SRC_x 2025-04-09 15:22:59 +02:00
stm32wb.dtsi dts: arm: stm32 reg definition for the st,stm32-qspi compatible 2025-06-24 09:13:33 +02:00