e0f02d93a6
Two DMA channels are assigned to AES channels A and B respectively. Each channel A/B has an interface to control the conditions that will generate requests on the related DMA channel: trigger condition, R/W address, and DMA done action. Signed-off-by: Julien Panis <jpanis@baylibre.com>
25 lines
769 B
Plaintext
25 lines
769 B
Plaintext
# CC23X0 AES accelerator configuration options
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# Copyright (c) 2024 BayLibre, SAS
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# SPDX-License-Identifier: Apache-2.0
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config CRYPTO_CC23X0
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bool "CC23X0 AES accelerator driver"
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default y
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depends on DT_HAS_TI_CC23X0_AES_ENABLED
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help
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Enable TI CC23X0 AES accelerator driver.
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This driver supports the following modes:
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- ECB (Electronic Code Book) encryption only (decryption not supported by the hardware)
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- CTR (Counter)
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- CCM (CTR with CBC-MAC)
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config CRYPTO_CC23X0_DMA
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bool "DMA support for TI CC23X0 AES accelerator devices"
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depends on CRYPTO_CC23X0
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select DMA
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help
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DMA driven transactions for the AES peripheral.
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DMA driven mode offloads data transfer tasks from the CPU
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and requires fewer interrupts to handle the AES operations.
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