fb7bdf0df4
This commit add require code for supporting RX architecture to Zephyr, it include: - Add require config and CMakelists for RX arch - Intialization startup code for RX - Interrupt and exception handling - Thread creation adn thread context switch - irq offload using SW interrupt Signed-off-by: Duy Nguyen <duy.nguyen.xa@renesas.com>
138 lines
4.0 KiB
ArmAsm
138 lines
4.0 KiB
ArmAsm
/*
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* Copyright (c) 2021 KT-Elektronik, Klaucke und Partner GmbH
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* Copyright (c) 2024 Renesas Electronics Corporation
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/toolchain.h>
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#include <zephyr/linker/sections.h>
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#include <offsets_short.h>
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GTEXT(_z_rx_arch_switch)
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GTEXT(_switch_isr_wrapper)
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/* void z_rx_arch_switch(void *switch_to, void **switched_from)
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*
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* @brief switch between threads
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*
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* @param switch_to (r1) pointer to switch handle of the new thread
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* @param switched_from (r2) pointer to pointer to switch handle of the old
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* thread
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*
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* Thread-switching is treated differently depending on whether it is a
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* cooperative switch triggered by old thread itself or a preemptive switch
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* triggered by an interrupt (in this case the function has been called from an
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* ISR).
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*/
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.section .text._z_rx_arch_switch
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.align 4
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_z_rx_arch_switch:
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mvfc psw,r3
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tst #0x130000, r3 /* test if PM, U or I bit are set*/
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bz _z_rx_context_switch_isr /* if none of them are set, this is an isr */
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mov #_coop_switch_to,r3
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mov r1,[r3]
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mov #_coop_switched_from,r3
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mov r2,[r3]
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/* trigger unconditional interrupt dedicated to thread switching. The content of r1 and r2
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* will not change by invoking the interrupt so the parameters switch_to and switched_from
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* will be available in _z_rx_context_switch_isr, which has been entered into the vector
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* table as ISR for interrupt 1
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*/
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int #1
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/* at this point, r0 points to the entry point, so RTS will enter it */
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rts
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/* void switch_isr_wrapper(void)
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*
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* @brief isr for interrupt 1 as wrapper for _z_rx_context_switch_isr
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*
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* _z_rx_context_switch_isr ends in rts, so it does not return from the interrupt context
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*/
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.section .text._switch_isr_wrapper
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.align 4
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_switch_isr_wrapper:
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pushm r1-r15
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/* Save the accumulator. */
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mvfachi r15 /* Accumulator high 32 bits. */
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push r15
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mvfacmi r15 /* Accumulator middle 32 bits. */
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shll #16, r15 /* Shifted left as it is restored to the low order word.*/
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push r15
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mov #_coop_switch_to,r3
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mov [r3],r1
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mov #_coop_switched_from,r3
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mov [r3],r2
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bsr _z_rx_context_switch_isr
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/* Restore the registers from the stack of the task pointed to by
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pxCurrentTCB. */
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pop r15
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mvtaclo r15 /* Accumulator low 32 bits. */
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pop r15
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mvtachi r15 /* Accumulator high 32 bits. */
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popm r1-r15
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rte
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/* void z_rx_context_switch_isr(void *switch_to, void **switched_from)
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*
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* @brief switch between threads in the interrupt context
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*
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* @param switch_to (r1) pointer to switch handle of the new thread
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* @param switched_from (r2) pointer to pointer to switch handle of the old thread
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*
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* since this is part of an ISR, PSW, PC and general registers of the old thread are already
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* stored in the interrupt stack, so copy the corresponding part of the interrupt stack to the
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* stack of the interrupted thread
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*/
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_z_rx_context_switch_isr:
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/* store arguments switch_to and switched_from to registers r4 and r5 as
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* registers r2 and r3 are needed for the smovf operation */
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mov r1,r4
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mov r2,r5
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/* set r2 (smovb source address) to the beginning of the interrupt stack */
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mov #(_z_interrupt_stacks + CONFIG_ISR_STACK_SIZE)-1,r2
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mvfc usp,r1 /* set r1 (smovb dest) to USP */
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sub #1,r1 /* correct by one byte to use smovb compared to push/pop */
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/* set r3 to number of bytes to move
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* Accumulator 64bit (4byte * 2)
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* 15*4 byte for 15 general registers
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* + PSW (4 byte)
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* + PC (4 byte)
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*/
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mov #76,r3
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smovb /* block copy from interrupt stack to old thread stack */
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add #1,r1 /* smovb leaves r1 pointing 1 byte before the stack */
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add #1,r2 /* same with r2 */
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mov r1,[r5] /* store stack pointer of old thread in *switched_from */
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mov r2,r1 /* set r1 (smovf dest) to the beginning of the interrupt stack */
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mov r4,r2 /* set r2 (smovf source) to the sp of the new thread*/
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mov #76,r3 /* set r3 to number of bytes to move */
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smovf /* block copy from new thread stack to interrupt stack */
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mvtc r2,usp /* set USP to the new thread stack */
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#ifdef CONFIG_INSTRUMENT_THREAD_SWITCHING
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bsr _z_thread_mark_switched_in
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#endif
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rts
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