zephyr/dts
Mahesh Mahadevan 5bebbb91b9 dts: rt10xx: Fix SAI dts entries
The clock gate register bits were incorrectly defined

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2022-09-16 14:50:06 -05:00
..
arc/synopsys soc: arc: define ICI in DT 2022-08-03 07:46:14 -04:00
arm dts: rt10xx: Fix SAI dts entries 2022-09-16 14:50:06 -05:00
arm64 boards: fvp_baser_aemv8r: fix wrong reg size 2022-09-09 16:36:37 +00:00
bindings dts: bindings: stm32 uart gives the EXTI line nb for PM 2022-09-15 15:02:47 +00:00
common
nios2/intel flash: nios2_qspi: Add dts binding and nodes for NIOS2 QSPI flash 2022-08-12 08:11:42 -04:00
posix
riscv dts: add gd32 fmc flash memory info 2022-09-08 10:13:05 +02:00
sparc/gaisler dts: sparc: Remove label property from devicetrees 2022-07-22 02:51:14 -05:00
x86/intel dts: x86: Remove label property from devicetrees 2022-07-22 02:51:45 -05:00
xtensa boards, dts: fix filenames and dts refs for adsp clock 2022-09-14 07:23:08 -04:00
binding-template.yaml
Kconfig dts: Include Kconfig.dts as optional source 2022-08-15 11:10:51 -07:00