91ceee782f
The current AArch64 interrupt system relies on the multi-level interrupt mechanism and the `irq_nextlevel` public interface to invoke the Generic Interrupt Controller (GIC) driver functions. Since the GIC driver has been refactored to provide a direct interface, in order to resolve various implementation issues described in the GIC driver refactoring commit, the architecture interrupt control functions are updated to directly invoke the GIC driver functions. This commit also adds support for the ARMv8 cores (e.g. Cortex-A53) that allow interfacing to a custom external interrupt controller (i.e. non-GIC) by mapping the architecture interrupt control functions to the SoC layer interrupt control functions when `ARM_CUSTOM_INTERRUPT_CONTROLLER` configuration is enabled. Signed-off-by: Stephanos Ioannidis <root@stephanos.io> |
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| .. | ||
| arc | ||
| arm | ||
| common | ||
| nios2 | ||
| posix | ||
| riscv | ||
| x86 | ||
| xtensa | ||
| arch_inlines.h | ||
| cpu.h | ||
| syscall.h | ||