d75f3cede8
Sample walk through:
1. CPU 0 will wake up CPU 1 after initialization
2. CPU 1 will send to CPU 0 an interrupt over MHU0
3. CPU 0 return the same to CPU 1 when received MHU0 interrupt
4. Test done when CPU 1 received MHU0 interrupt
The wake up second core and private core ID are soc specific.
Signed-off-by: Karl Zhang <karl.zhang@linaro.org>
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| .. | ||
| ipm_imx | ||
| ipm_mailbox | ||
| ipm_mcux | ||
| ipm_mhu_dual_core | ||
| openamp | ||
| ipc.rst | ||