Henry Hsieh 58d50a0e97 riscv: fix non-standard assembly of RISC-V ... Non-standard `jalr rd, rs` pseudo-instructions are used. This commit changes them to `ret` for standard return pseudo-instruction or `jalr rd, rs, 0` for no offset jump register and link. Fixes #41100. Signed-off-by: Henry Hsieh <r901042004@yahoo.com.tw>		2022-02-04 11:23:39 +01:00
..
arc	soc: arc: fix ARC_HAS_ACCL_REGS settings	2021-12-02 11:32:14 -06:00
arm	drivers: adc: adc_sam0: Change local variables to lower case	2022-02-04 10:49:09 +01:00
arm64	soc: remove unnecessary inclusions of devicetree.h	2022-01-11 11:52:27 +01:00
mips	soc: mips: add Qemu Malta support	2022-01-19 13:48:21 -05:00
nios2
posix	posix: Add missing include	2021-04-27 13:17:36 -04:00
riscv	riscv: fix non-standard assembly of RISC-V	2022-02-04 11:23:39 +01:00
sparc
x86	bluetooth: remove Kconfig options CONFIG_BT_*_ON_DEV_NAME	2021-08-25 18:05:17 -04:00
xtensa	soc: xtensa: Replaced /dev/null in scripts	2022-02-03 07:59:55 -05:00
Kconfig	kconfig: soc and shield cleanup	2021-06-11 16:13:22 +02:00