Siew Chin Lim 3bb0c3e33f dts: arm64: Add device tree for Intel SoC FPGA Agilex ... Add device tree for Intel SoC FPGA Agilex initial bring up. This is the first version of device tree which enable single CPU core and basic drivers that needed by hello_world example. Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>		2021-10-12 08:37:03 -04:00
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broadcom
intel_socfpga	dts: arm64: Add device tree for Intel SoC FPGA Agilex	2021-10-12 08:37:03 -04:00
nxp	board: nxp_ls1046ardb: add 2 cores smp for running in Jailhouse	2021-04-22 11:29:54 +02:00
qemu-virt	dts: virt: Move sram node to DT board files	2021-04-14 14:20:00 -05:00
armv8-a.dtsi
armv8-r.dtsi