zephyr/arch/xtensa/include
Andrew Boie 2dd91eca0e kernel: move thread monitor init to common code
The original implementation of CONFIG_THREAD_MONITOR would
try to leverage a thread's initial stack layout to provide
the entry function with arguments for any given thread.

This is problematic:

- Some arches do not have a initial stack layout suitable for
this
- Some arches never enabled this at all (riscv32, nios2)
- Some arches did not enable this properly
- Dropping to user mode would erase or provide incorrect
information.

Just spend a few extra bytes to store this stuff directly
in the k_thread struct and get rid of all the arch-specific
code for this.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2018-06-06 14:26:45 -04:00
..
kernel_arch_data.h kernel: Add alternative _arch_switch context switch primitive 2018-02-16 10:44:29 -05:00
kernel_arch_func.h xtensa: fix CONFIG_INIT_STACKS for IRQ stack 2018-05-16 12:06:31 -07:00
kernel_arch_thread.h kernel: move thread monitor init to common code 2018-06-06 14:26:45 -04:00
kernel_event_logger_arch.h Xtensa port: Added Xtensa specific code (C + S) files. 2017-02-13 08:04:27 -08:00
offsets_short_arch.h xtensa port: Fixed crash on startup on CP enabled cores 2017-04-13 11:54:49 -07:00
xtensa_api.h xtensa: Implement _xt_ints_on/off for asm2 2018-02-16 10:44:29 -05:00
xtensa_config.h cleanup: rename fiber/task -> thread 2017-10-30 18:41:15 -04:00
xtensa_context.h xtensa port: Clear the CP descriptor of new created thread. 2017-04-20 16:01:55 +00:00
xtensa_rtos.h timer: xtensa_sys_timer: Tickless Kernel Implementation for Xtensa 2017-11-07 08:17:40 -05:00
xtensa_timer.h timer: xtensa_sys_timer: Tickless Kernel Implementation for Xtensa 2017-11-07 08:17:40 -05:00
xtensa-asm2-context.h xtensa: New asm layer to support SMP 2018-02-16 10:44:29 -05:00
xtensa-asm2-s.h xtensa/asm2: Save shift/loop registers on exception entry 2018-03-06 14:13:56 -08:00
xtensa-asm2.h xtensa: New asm layer to support SMP 2018-02-16 10:44:29 -05:00