a2ab04b679
This is a new parameter to divide the LPTIM input clock by a prescaler, changing the max reachable timeout of the LP timer. It will divide the LPTIM input clock by 1 (reset value) up to 128. The lptim configuration register is written with a 3bit value. Signed-off-by: Francois Ramu <francois.ramu@st.com> |
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| .. | ||
| arc/synopsys | ||
| arm | ||
| arm64 | ||
| bindings | ||
| common | ||
| nios2/intel | ||
| posix | ||
| riscv | ||
| sparc/gaisler | ||
| x86/intel | ||
| xtensa | ||
| binding-template.yaml | ||
| Kconfig | ||