80a863f947
Add a stress test for sip_svc subsystem using INTEL SOCFPGA AGILEX platform. Signed-off-by: Mahesh Rao <mahesh.rao@intel.com>
12 lines
334 B
YAML
12 lines
334 B
YAML
# Copyright (c) 2022-2023, Intel Corporation.
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# SPDX-License-Identifier: Apache-2.0
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tests:
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sip_svc.stress_test.ztest:
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build_only: true
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platform_allow: intel_socfpga_agilex_socdk intel_socfpga_agilex5_socdk
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integration_platforms:
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- intel_socfpga_agilex_socdk
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- intel_socfpga_agilex5_socdk
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tags: sip_svc
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